Daniel Leung 984002de6d xtensa: rename z_arch_irq_is_enabled for multi-level interrupts ... This follows the z_arch_irq_en-/dis-able() so that the SoC definitions are responsible for functions related to multi-level interrupts. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2019-09-07 10:20:51 -04:00
..
arc	arc: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
arm	arch/arm: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
common	arch/common: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
nios2	arch/nios2: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
posix	POSIX arch: Fixe issues related to extern "C"	2019-08-12 15:10:15 +02:00
riscv	arch/riscv: rearrange for standard use of extern "C"	2019-08-18 16:20:10 +02:00
x86	arch/x86: remove support for IAMCU ABI	2019-09-07 10:07:42 -04:00
x86_64	kernel: rename NANO_ESF	2019-07-25 15:06:58 -07:00
xtensa	xtensa: rename z_arch_irq_is_enabled for multi-level interrupts	2019-09-07 10:20:51 -04:00
cpu.h	riscv32: rename to riscv	2019-08-02 13:54:48 -07:00
syscall.h	arch/x86: move arch/x86/syscall.h to arch/x86/ia32/syscall.h	2019-07-02 19:30:00 -04:00