zephyr/soc
Adrian Warecki 21f278c04b adsp: boot: power: Fixed used register name
The code used the name DFDSPBRCP referring to the DSP Boot / Recovery
Capability Pointer register from DSP Subsystem Capability / Status
Registers range. The address used, however, pointed to DSP Core Shim
(DSPCS) registers block. Changed define names to not be misleading.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-01-09 17:05:58 -05:00
..
arc arc: add nsim_em11d target 2022-12-19 11:56:55 +01:00
arm soc: nxp: Add Power Management support for RT5xx 2023-01-04 11:03:42 -06:00
arm64 board: arm64: add pinctrl support for imx93 evk board 2022-12-20 09:22:40 +01:00
mips
nios2
posix cmake: Update CONFIG_ASAN support 2022-08-19 08:30:01 +02:00
riscv driver: systimer: increase esp32c3 tick resolution 2023-01-04 14:24:25 +01:00
sparc
x86 soc: x86: Used fixed BDF values for early serial 2022-11-16 11:18:43 +01:00
xtensa adsp: boot: power: Fixed used register name 2023-01-09 17:05:58 -05:00
Kconfig soc: Add ability for SOC to specify runtime CPU detection 2022-11-03 16:43:53 -04:00