Add initial SoC support for the TI J721E SoC series Cortex-R5 core. TRM for J721e https://www.ti.com/lit/zip/spruil1 File: spruil1c.pdf Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com> Signed-off-by: Andrew Davis <afd@ti.com> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||