The "cross stack call" mechanism has intermediate states where the stack frames are not valid for our own interrupt entry code, which causes corruption if an interrupt races at exactly the right time. Leave interrupts masked until just before the call. The fix is midly complicated by the fact that we RELY on nested window exception frames to spill registers from the interruptee, so have to do the masking with PS.INTLEVEL, which requires a register to save its contents, which we don't have since everything needs to happen in one 4-register window. But thankfully our Zephyr-reserved EPS register is guaranteed to be available through this process. Fixes #57009 Signed-off-by: Andy Ross <andyross@google.com> |
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| .. | ||
| kernel_arch_func.h | ||
| offsets_short_arch.h | ||
| xtensa-asm2-context.h | ||
| xtensa-asm2-s.h | ||
| xtensa-asm2.h | ||