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zephyr/arch/xtensa/core
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Flavio Ceolin c4025f026f arch: xtensa: Remove unecessary logic in backtrace 
In z_xtensa_backtrace_print the parameter depth is checked for <= 0.
There is no need to check it again later, also, since the variable is
not used after the while loop we can use directly the parameter without
an additional variable.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-05-12 18:31:13 -04:00
..
include arch: xtensa: core: include: Update header to use guard macros 2022-07-20 13:39:23 -05:00
offsets xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
startup soc/intel_adsp: Unify Xtensa CPU reset between cores 2021-12-14 18:43:05 -06:00
CMakeLists.txt arch/xtensa: Add CCOUNT-based timing API 2022-06-07 19:04:42 +02:00
coredump.c xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
cpu_idle.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
crt1.S
debug_helpers_asm.S xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
fatal.c xtensa: limit speical exit() to XT_SIMULATOR 2023-05-08 09:59:54 +02:00
gdbstub.c xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
gen_zsr.py arch/xtensa: Rework irq_offload: automatic config, SMP-safe 2022-02-21 22:10:03 -05:00
irq_manage.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
irq_offload.c include: add missing zephyr/irq.h include 2022-10-17 22:57:39 +09:00
README-WINDOWS.rst
timing.c includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h> 2022-09-05 16:31:47 +02:00
tls.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
window_vectors.S arch/xtensa: Use ZSR assignments for the alloca exception 2022-01-20 12:58:00 -05:00
xcc_stubs.c arch: migrate includes to <zephyr/...> 2022-05-06 19:57:22 +02:00
xtensa_backtrace.c arch: xtensa: Remove unecessary logic in backtrace 2023-05-12 18:31:13 -04:00
xtensa_intgen.py include: add zephyr/ on script generated #include 2022-05-27 15:20:27 -07:00
xtensa_intgen.tmpl
xtensa-asm2-util.S xtensa: add some structs for interrupt stack frames 2023-04-20 04:45:52 -04:00
xtensa-asm2.c xtensa: tls: Fix invalid reference 2023-05-11 17:38:16 -04:00