Alexandre Bourdiol a276603c2d test: arch: arm: arm_interrupt: clear FPSCR register in ISR ... Clear Floating Point Status and Control Register (FPSCR), to prevent from having the interrupt line set to pending again, in case FPU IRQ is selected by the test as "Available IRQ line" Fixes #31982 Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>		2021-02-14 16:37:49 -05:00
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arm	test: arch: arm: arm_interrupt: clear FPSCR register in ISR	2021-02-14 16:37:49 -05:00
x86	x86: map all RAM if ACPI	2021-01-23 19:47:23 -05:00
xtensa_asm2	xtensa: add support for thread local storage	2020-10-24 10:52:00 -07:00