ecb25fec51
Page tables created at build time may not include the gperf data at the very end of RAM. Ensure this is mapped properly at runtime to work around this. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
53 lines
1.6 KiB
Plaintext
53 lines
1.6 KiB
Plaintext
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifdef CONFIG_USERSPACE
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z_kobject_data_begin = .;
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/* Constraints:
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*
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* - changes to the size of this section between build phases
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* *must not* shift the memory address of any kernel obejcts,
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* since it contains a hashtable of the memory addresses of those
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* kernel objects
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*
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* - It is OK if this section itself is shifted in between builds; for
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* example some arches may precede this section with generated MMU
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* page tables which are also unpredictable in size.
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*
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* The size of the
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* gperf tables is both a function of the number of kernel objects,
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* *and* the specific memory addresses being hashed. It is not something
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* that can be predicted without actually building and compling it.
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*/
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SECTION_DATA_PROLOGUE(kobject_data,,)
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{
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*(".kobject_data.data*")
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#ifndef LINKER_PASS2
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#ifdef CONFIG_DYNAMIC_OBJECTS
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PROVIDE(_thread_idx_map = .);
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. += CONFIG_MAX_THREAD_BYTES;
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#endif
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#endif
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/* This is also unpredictable in size, and has the same constraints.
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* On XIP systems this will get put at the very end of ROM.
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*/
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#ifndef CONFIG_XIP
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*(".kobject_data.rodata*")
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#endif
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#ifdef CONFIG_GEN_PRIV_STACKS
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SECTION_DATA_PROLOGUE(priv_stacks_noinit,,)
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{
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z_priv_stacks_ram_start = .;
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*(".priv_stacks.noinit")
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z_priv_stacks_ram_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#endif /* CONFIG_GEN_PRIV_STACKS */
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#endif /* CONFIG_USERSPACE */
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