Peter Bigot 4720585077 arch: sparc: fix memory barrier behavior of arch_irq_*lock ... Correct functioning of spinlocks requires that they be memory barriers. Most architectures achieve this by using the GCC extended asm syntax to force a compiler soft barrier at the point the interrupt status is changing. This clobber was missing from the SPARC definition, so add it. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>		2021-01-26 13:42:17 -05:00
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arch.h	arch: sparc: fix memory barrier behavior of arch_irq_*lock	2021-01-26 13:42:17 -05:00
linker.ld
sparc.h
thread.h