Kumar Gala cbd9608441 dts: bindings: remove default usage in gaisler,irqmp ... Use of default for eirq is not needed, the property is explicitly set when needed. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>		2021-02-03 13:41:47 -05:00
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arm,gic.yaml
arm,v6m-nvic.yaml
arm,v7m-nvic.yaml
arm,v8m-nvic.yaml
atmel,sam0-eic.yaml
cypress,psoc6-int-mux.yaml	soc: arm: cypress: psoc6: Add Cortex-M0+ int mux support	2021-01-20 17:54:09 -06:00
cypress,psoc6-intmux-ch.yaml	soc: arm: cypress: psoc6: Add Cortex-M0+ int mux support	2021-01-20 17:54:09 -06:00
gaisler,irqmp.yaml	dts: bindings: remove default usage in gaisler,irqmp	2021-02-03 13:41:47 -05:00
intel,cavs-intc.yaml
intel,ioapic.yaml
intel,vt-d.yaml	dts: Add bindings for Intel VT-D interrupt remapper device	2020-12-08 09:29:20 -05:00
interrupt-controller.yaml
ite,it8xxx2-intc.yaml	dts: it8xxx2 device tree and binding	2020-12-16 08:47:36 -05:00
nuvoton,npcx-miwu-int-map.yaml
nuvoton,npcx-miwu-wui-map.yaml
nuvoton,npcx-miwu.yaml
openisa,rv32m1-event-unit.yaml
openisa,rv32m1-intmux-ch.yaml
openisa,rv32m1-intmux.yaml
riscv,clint0.yaml	dts/bindings: Add binding for riscv,clint0	2020-11-19 17:00:46 -05:00
riscv,cpu-intc.yaml
riscv,plic0.yaml	dts: bindings: add IRQ priority support for SiFive PLIC	2021-01-14 12:43:58 -06:00
shared-irq.yaml
sifive,plic-1.0.0.yaml
snps,archs-idu-intc.yaml
snps,arcv2-intc.yaml
snps,designware-intc.yaml
swerv,pic.yaml
vexriscv,intc0.yaml
xtensa,intc.yaml