nRF51x SoC is based on ARM Cortex-M0 and running at 16MHz clock.
Due to Radio ISR latency restriction, the CPU utilization within
BLE tIFS of 150 us should not be more than the time radio h/w
takes to get ready. In order to keep short CPU utilization
inside tIFS encryption procedure has been spread over several
connection intervals. In comparison to possible encryption setup
in 3 connection intervals, this commit introduces a encryption
setup being done in 5 connection intervals so that max. CPU time
is well within the permissible limits by nRF51 h/w and tIFS.
Change-Id: I8971d69675836b9e18bea59d95951e0dfe8a7d2d
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
c41d3edda8