zephyr/dts/bindings/interrupt-controller
Martí Bolívar f5a91d7a3f dts: use 'cdns' instead of 'xtensa' vendor prefix
These IP blocks' vendor is Cadence, whose proper vendor prefix is
'cdns' if we are going to match the Linux vendor prefixes list.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-08-17 17:51:57 -04:00
..
arm,gic.yaml
arm,v6m-nvic.yaml
arm,v7m-nvic.yaml
arm,v8.1m-nvic.yaml arch: arm: Add initial support for Cortex-M55 Core 2021-03-23 13:13:32 -05:00
arm,v8m-nvic.yaml
atmel,sam0-eic.yaml
cdns,xtensa-core-intc.yaml dts: use 'cdns' instead of 'xtensa' vendor prefix 2021-08-17 17:51:57 -04:00
cypress,psoc6-int-mux.yaml
cypress,psoc6-intmux-ch.yaml
espressif,esp32-intc.yaml esp32: drivers: interrupt_controller: add interrupt allocation support 2021-07-16 07:19:28 -04:00
gaisler,irqmp.yaml
intel,cavs-intc.yaml
intel,ioapic.yaml
intel,vt-d.yaml
interrupt-controller.yaml
ite,it8xxx2-intc.yaml
microchip,xec-ecia-girq.yaml Microchip: MEC172x Add aggregated interrupt driver 2021-07-26 12:24:52 -04:00
microchip,xec-ecia.yaml Microchip: MEC172x Add aggregated interrupt driver 2021-07-26 12:24:52 -04:00
nuvoton,npcx-miwu-int-map.yaml dts: npcx: Fixed the name of nodes in vw, miwu-wui, and miwu-int files. 2021-04-13 13:00:19 -04:00
nuvoton,npcx-miwu-wui-map.yaml
nuvoton,npcx-miwu.yaml
openisa,rv32m1-event-unit.yaml
openisa,rv32m1-intmux-ch.yaml
openisa,rv32m1-intmux.yaml
riscv,clint0.yaml
riscv,cpu-intc.yaml
riscv,plic0.yaml
shared-irq.yaml
sifive,plic-1.0.0.yaml
snps,archs-idu-intc.yaml
snps,arcv2-intc.yaml
snps,designware-intc.yaml
st,stm32-exti.yaml dts: stm32: Add exti nodes to stm32 series 2021-02-17 14:26:23 -06:00
swerv,pic.yaml
vexriscv-intc0.yaml dts: rename 'vexriscv,intc0' compatible to 'vexriscv-intc0' 2021-08-17 17:51:57 -04:00