3d9ba10b5c
The original exception handling has space to optimize and
and some bugs need to be fixed.
* define NANO_ESF
* add the definition of NANO_ESF which is an irq_stack_frame
* add the corresponding codes in exception entry and handler
* remove _default_esf
* implement the _ARCH_EXCEPT
* use trap exception to raise exception by kernel
* add corresponding trap exception entry
* add _do_kernel_oops to handle the exception raised by
_ARCH_EXCEPT.
* add the thread context switch in exception return
* case: kernel oops may raise thread context switch
* case: some tests will re-implement SysFatalHandler to raise
thread context switch.
* as the exception and isr are handled in kernel isr stack, so
the thread context switch must be in the return of exception/isr
, and the exception handler must return, should not be decorated
with FUNC_NORETURN
* for arc, _is_in_isr should consider the case of exception
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
79 lines
1.6 KiB
C
79 lines
1.6 KiB
C
/*
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* Copyright (c) 2014-2016 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Private kernel definitions
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*
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* This file contains private kernel structures definitions and various
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* other definitions for the ARCv2 processor architecture.
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*
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* This file is also included by assembly language files which must #define
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* _ASMLANGUAGE before including this header file. Note that kernel
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* assembly source files obtains structure offset values via "absolute
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* symbols" in the offsets.o module.
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*/
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#ifndef _kernel_arch_func__h_
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#define _kernel_arch_func__h_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if !defined(_ASMLANGUAGE)
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#ifdef CONFIG_CPU_ARCV2
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#include <v2/cache.h>
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#include <v2/irq.h>
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#endif
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static ALWAYS_INLINE void kernel_arch_init(void)
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{
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_irq_setup();
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}
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static ALWAYS_INLINE void
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_set_thread_return_value(struct k_thread *thread, unsigned int value)
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{
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thread->arch.return_value = value;
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}
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/**
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*
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* @brief Indicates the interrupt number of the highest priority
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* active interrupt
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*
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* @return IRQ number
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*/
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static ALWAYS_INLINE int _INTERRUPT_CAUSE(void)
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{
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u32_t irq_num = _arc_v2_aux_reg_read(_ARC_V2_ICAUSE);
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return irq_num;
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}
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#define _is_in_isr _arc_v2_irq_unit_is_in_isr
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extern void _thread_entry_wrapper(void);
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extern void _user_thread_entry_wrapper(void);
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static inline void _IntLibInit(void)
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{
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/* nothing needed, here because the kernel requires it */
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}
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extern void _arc_userspace_enter(k_thread_entry_t user_entry, void *p1,
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void *p2, void *p3, u32_t stack, u32_t size);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _kernel_arch_func__h_ */
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