bf7f53d0cd
This commit aligns the buffers to 32 bytes in uart_async_api testcases.This is because most of the platform DMA operations are aligned to 32 bytes.This ensures proper memory alignment for cache handling and avoid potential unaligned access issues. Signed-off-by: S Swetha <s.swetha@intel.com> |
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| .. | ||
| uart_async_api | ||
| uart_async_rx | ||
| uart_basic_api | ||
| uart_elementary | ||
| uart_emul | ||
| uart_errors | ||
| uart_mix_fifo_poll | ||
| uart_pm | ||