75caa2b084
Put the reason code in r0 and make a SVC #2 call, which will be propagated to _fatal_error_handler as an exception. The _is_in_isr() implementation had to be tweaked a bit. User-generated SVC exception no longer just used for irq_offload(); just because we are in it does not mean we are in interrupt context. Instead, have the irq_offload code set and clear the offload_routine global; it will be non-NULL only if it's in use. Upcoming changes to support memory protection (which will require system calls) will need this too. We free up some small amount of ROM deleting _default_esf struct as it's no longer needed. Issue: ZEP-843 Change-Id: Ie82bd708575934cffe41e64f5c128c8704ca4e48 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
83 lines
1.6 KiB
C
83 lines
1.6 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Cortex-M public exception handling
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*
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* ARM-specific kernel exception handling interface. Included by arm/arch.h.
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*/
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#ifndef _ARCH_ARM_CORTEXM_EXC_H_
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#define _ARCH_ARM_CORTEXM_EXC_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* for assembler, only works with constants */
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#define _EXC_PRIO(pri) (((pri) << (8 - CONFIG_NUM_IRQ_PRIO_BITS)) & 0xff)
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#ifdef CONFIG_ZERO_LATENCY_IRQS
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#define _ZERO_LATENCY_IRQS_RESERVED_PRIO 1
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#else
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#define _ZERO_LATENCY_IRQS_RESERVED_PRIO 0
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#endif
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#if defined(CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS) || \
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defined(CONFIG_CPU_CORTEX_M_HAS_BASEPRI)
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#define _EXCEPTION_RESERVED_PRIO 1
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#else
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#define _EXCEPTION_RESERVED_PRIO 0
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#endif
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#define _IRQ_PRIO_OFFSET \
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(_ZERO_LATENCY_IRQS_RESERVED_PRIO + \
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_EXCEPTION_RESERVED_PRIO)
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#define _EXC_IRQ_DEFAULT_PRIO _EXC_PRIO(_IRQ_PRIO_OFFSET)
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#ifdef _ASMLANGUAGE
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GTEXT(_ExcExit);
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#else
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#include <zephyr/types.h>
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struct __esf {
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sys_define_gpr_with_alias(a1, r0);
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sys_define_gpr_with_alias(a2, r1);
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sys_define_gpr_with_alias(a3, r2);
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sys_define_gpr_with_alias(a4, r3);
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sys_define_gpr_with_alias(ip, r12);
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sys_define_gpr_with_alias(lr, r14);
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sys_define_gpr_with_alias(pc, r15);
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u32_t xpsr;
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#ifdef CONFIG_FLOAT
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float s[16];
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u32_t fpscr;
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u32_t undefined;
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#endif
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};
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typedef struct __esf NANO_ESF;
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extern void _ExcExit(void);
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/**
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* @brief display the contents of a exception stack frame
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*
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* @return N/A
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*/
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extern void sys_exc_esf_dump(NANO_ESF *esf);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ARCH_ARM_CORTEXM_EXC_H_ */
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