bf2139331c
This adds vectors for all interrupt levels defined by core-isa.h. Modify the entry code a little bit to select correct linker sections (levels 1, 6 and 7 get special names for... no particularly good reason) and to constructed the interrupted PS value correctly (no EPS1 register for exceptions since they had to have interrupted level 0 code and thus differ only in the EXCM bit). Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
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| .. | ||
| kernel_arch_data.h | ||
| kernel_arch_func.h | ||
| kernel_arch_thread.h | ||
| kernel_event_logger_arch.h | ||
| offsets_short_arch.h | ||
| xtensa_api.h | ||
| xtensa_config.h | ||
| xtensa_context.h | ||
| xtensa_rtos.h | ||
| xtensa_timer.h | ||
| xtensa-asm2-context.h | ||
| xtensa-asm2-s.h | ||
| xtensa-asm2.h | ||