a44e88df2a
Pass Zephyr type format specifiers to TC_PRINT(). Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
80 lines
1.5 KiB
C
80 lines
1.5 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr.h>
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#include <tc_util.h>
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int test_frequency(void)
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{
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u32_t start, end, delta, pct;
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TC_PRINT("Testing system tick frequency\n");
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start = k_cycle_get_32();
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k_sleep(1000);
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end = k_cycle_get_32();
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delta = end - start;
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pct = (u64_t)delta * 100 / sys_clock_hw_cycles_per_sec;
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printk("delta: %u expected: %u %u%%\n", delta,
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sys_clock_hw_cycles_per_sec, pct);
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/* Heuristic: if we're more than 10% off, throw an error */
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if (pct < 90 || pct > 110) {
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TC_PRINT("Clock calibration is way off!\n");
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return -1;
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}
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return 0;
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}
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void main(void)
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{
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u32_t t_last, t_now, i, errors;
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s32_t diff;
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int rv = TC_PASS;
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errors = 0;
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TC_PRINT("sys_clock_us_per_tick = %d\n", sys_clock_us_per_tick);
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TC_PRINT("sys_clock_hw_cycles_per_tick = %d\n",
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sys_clock_hw_cycles_per_tick);
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TC_PRINT("sys_clock_hw_cycles_per_sec = %d\n",
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sys_clock_hw_cycles_per_sec);
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TC_START("test monotonic timer");
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t_last = k_cycle_get_32();
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for (i = 0; i < 1000000; i++) {
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t_now = k_cycle_get_32();
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if (t_now < t_last) {
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diff = t_now - t_last;
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TC_PRINT("diff = %d (t_last = %u : t_now = %u);"
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"i = %u\n", diff, t_last, t_now, i);
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errors++;
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}
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t_last = t_now;
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}
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if (errors) {
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TC_PRINT("errors = %d\n", errors);
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rv = TC_FAIL;
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} else {
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TC_PRINT("Cycle results appear to be monotonic\n");
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}
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if (test_frequency()) {
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rv = TC_FAIL;
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}
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TC_END_REPORT(rv);
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}
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