174f301147
For various reasons its often necessary to generate certain complex data structures at build-time by separate tools outside of the C compiler. Data is populated to these tools by way of special binary sections not intended to be included in the final binary. We currently do this to generate interrupt tables, forthcoming work will also use this to generate MMU page tables. The way we have been doing this is to generatea "kernel_prebuilt.elf", extract the metadata sections with objcopy, run the tool, and then re-link the kernel with the extra data *and* use objcopy to pull out the unwanted sections. This doesn't scale well if multiple post-build steps are needed. Now this is much simpler; in any Makefile, a special GENERATED_KERNEL_OBJECT_FILES variable may be appended to containing the filenames to the generated object files, which will be generated by Make in the usual fashion. Instead of using objcopy to pull out, we now create a linker-pass2.cmd which additionally defines LINKER_PASS2. The source linker script can #ifdef around this to use the special /DISCARD/ section target to not include metadata sections in the final binary. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
53 lines
1.4 KiB
Plaintext
53 lines
1.4 KiB
Plaintext
/*
|
|
* Copyright (c) 2017 Intel Corporation
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
/* This creates a special section which is not included by the final binary,
|
|
* instead it is consumed by the gen_isr_tables.py script.
|
|
*
|
|
* What we create here is a data structure:
|
|
*
|
|
* struct {
|
|
* void *spurious_irq_handler;
|
|
* void *sw_irq_handler;
|
|
* u32_t num_isrs;
|
|
* u32_t num_vectors;
|
|
* struct _isr_list isrs[]; <- of size num_isrs
|
|
* }
|
|
*
|
|
* Which indicates the memory address of the spurious IRQ handler and the
|
|
* number of isrs that were defined, the total number of IRQ lines in the
|
|
* system, followed by an appropriate number of instances of
|
|
* struct _isr_list. See include/sw_isr_table.h
|
|
*
|
|
* You will need to declare a bogus memory region for IDT_LIST. It doesn't
|
|
* matter where this region goes as it is stripped from the final ELF image.
|
|
* The address doesn't even have to be valid on the target. However, it
|
|
* shouldn't overlap any other regions. On most arches the following should be
|
|
* fine:
|
|
*
|
|
* MEMORY {
|
|
* .. other regions ..
|
|
* IDT_LIST : ORIGIN = 0xfffff7ff, LENGTH = 2K
|
|
* }
|
|
*/
|
|
|
|
#ifndef LINKER_PASS2
|
|
SECTION_PROLOGUE(.intList,,)
|
|
{
|
|
KEEP(*(.irq_info))
|
|
LONG((__INT_LIST_END__ - __INT_LIST_START__) / __ISR_LIST_SIZEOF)
|
|
__INT_LIST_START__ = .;
|
|
KEEP(*(.intList))
|
|
__INT_LIST_END__ = .;
|
|
} GROUP_LINK_IN(IDT_LIST)
|
|
#else
|
|
/DISCARD/ :
|
|
{
|
|
KEEP(*(.irq_info))
|
|
KEEP(*(.intList))
|
|
}
|
|
#endif
|