7a2bddd75a
Add a binding to represent a PCIe bus. This way PCIe devices can be ordered under a parent PCIe bus object and make help of DT BUS macros for conditional code. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
15 lines
246 B
YAML
15 lines
246 B
YAML
# Copyright (c) 2020 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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# Common fields for PCIe bus controllers
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include: base.yaml
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bus: pcie
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properties:
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"#address-cells":
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required: true
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"#size-cells":
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required: true
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