0f9406277d
AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
65 lines
2.0 KiB
C
65 lines
2.0 KiB
C
/*
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* Copyright 2020 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_PSCI_PSCI_H_
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#define ZEPHYR_DRIVERS_PSCI_PSCI_H_
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#include <drivers/pm_cpu_ops/psci.h>
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#ifdef CONFIG_64BIT
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#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name
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#else
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#define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN_##name
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#endif
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/* PSCI v0.2 interface */
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#define PSCI_0_2_FN_BASE 0x84000000
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#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n))
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#define PSCI_0_2_64BIT 0x40000000
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#define PSCI_0_2_FN64_BASE \
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(PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
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#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n))
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#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0)
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#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
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#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2)
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#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3)
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#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4)
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#define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5)
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#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6)
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#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7)
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#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8)
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#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9)
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#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
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#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
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#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)
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#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5)
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#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7)
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/* PSCI return values (inclusive of all PSCI versions) */
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#define PSCI_RET_SUCCESS 0
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#define PSCI_RET_NOT_SUPPORTED -1
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#define PSCI_RET_INVALID_PARAMS -2
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#define PSCI_RET_DENIED -3
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#define PSCI_RET_ALREADY_ON -4
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#define PSCI_RET_ON_PENDING -5
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#define PSCI_RET_INTERNAL_FAILURE -6
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#define PSCI_RET_NOT_PRESENT -7
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#define PSCI_RET_DISABLED -8
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#define PSCI_RET_INVALID_ADDRESS -9
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typedef unsigned long (psci_fn)(unsigned long, unsigned long,
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unsigned long, unsigned long);
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struct psci {
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enum arm_smccc_conduit conduit;
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psci_fn *invoke_psci_fn;
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uint32_t ver;
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};
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#endif /* ZEPHYR_DRIVERS_PSCI_PSCI_H_ */
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