29f87c3a0f
Disable RTC WDT enabled (by default) by 2nd stage bootloader in ESP-IDF. This WDT timer ensures correct hand-over and startup sequence from bootloader to application. Enabling bootloader caused system clock initialization to fail when clock rate is greater then 80MHz. This also fixes esp32 clock source code. Signed-off-by: Mahavir Jain <mahavir@espressif.com>
35 lines
535 B
Plaintext
35 lines
535 B
Plaintext
# SPDX-License-Identifier: Apache-2.0
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CONFIG_XTENSA_RESET_VECTOR=n
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CONFIG_BOARD_ESP32=y
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CONFIG_SOC_ESP32=y
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CONFIG_MAIN_STACK_SIZE=2048
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=240000000
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CONFIG_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_ESP32=y
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CONFIG_XTENSA_USE_CORE_CRT1=n
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CONFIG_PINMUX=y
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CONFIG_PINMUX_ESP32=y
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CONFIG_GPIO=y
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CONFIG_GPIO_ESP32=y
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CONFIG_GEN_ISR_TABLES=y
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CONFIG_GEN_IRQ_VECTOR_TABLE=n
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CONFIG_I2C=y
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CONFIG_I2C_ESP32=y
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CONFIG_I2C_0=y
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CONFIG_I2C_1=y
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CONFIG_CLOCK_CONTROL=y
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CONFIG_BOOTLOADER_ESP_IDF=y
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