4c57f3400a
The ARM Cortex-M1/M3 DesignStart FPGA reference designs support booting from an off-board, memory-mapped QSPI NOR flash device. The V2C DAPlink shield from ARM Ltd. provides support for this feature. If the board/shield is not configured for booting from the QSPI NOR device, that same device is available as a regular QSPI NOR flash device. The presense of a shield configured for QSPI NOR flash boot is indicated through an IRQ line used as a level-detect, non-interrupt signal. Introduce a board specific devicetree binding for the DAPLink QSPI MUX and provide a board specific API accessing it. Automatically set the QSPI MUX to to provide regular QSPI NOR flash access if the board/shield is not configured for memory-mapped QSPI NOR flash boot. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
30 lines
1.2 KiB
CMake
30 lines
1.2 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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zephyr_library()
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zephyr_library_sources(board.c)
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if((CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1) AND (CONFIG_BUILD_OUTPUT_BIN))
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# Generate zephyr.mem verilog memory hex dump file for initialising ITCM in
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# Xilinx Vivado.
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#
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# This ought to be done using the objcopy verilog bfd, but it contains a bug
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# affecting endianness: https://sourceware.org/bugzilla/show_bug.cgi?id=25202
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#
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# Instead we use bin2hex from the SiFive elf2hex package, if available.
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# https://github.com/sifive/elf2hex
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find_program(BIN2HEX ${CROSS_COMPILE_TARGET}-bin2hex)
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if(NOT ${BIN2HEX} STREQUAL BIN2HEX-NOTFOUND)
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set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
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COMMAND ${BIN2HEX}
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ARGS --bit-width 32
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${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin
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${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.mem
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WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
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)
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message(STATUS "Verilog memory hex dump will be written to: ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.mem")
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else()
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message(STATUS "The bin2hex (${CROSS_COMPILE_TARGET}-bin2hex) utility was not found, verilog memory hex dump file cannot be generated")
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endif()
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endif()
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