Andy Ross ae4f7a1a06 arch/xtensa: Remember to spill windows in arch_cohere_stacks() ... When we reach this code in interrupt context, our upper GPRs contain a cross-stack call that may still include some registers from the interrupted thread. Those need to go out to memory before we can do our cache coherence dance here. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2021-03-08 11:14:27 -05:00
..
kernel_arch_func.h	arch/xtensa: Remember to spill windows in arch_cohere_stacks()	2021-03-08 11:14:27 -05:00
offsets_short_arch.h	arch/xtensa: General cleanup, remove dead code	2021-03-08 11:14:27 -05:00
xtensa-asm2-context.h	arch: xtensa: Print backtrace from panic handler	2021-01-23 08:43:10 -05:00
xtensa-asm2-s.h	arch/xtensa: Remember to spill windows in arch_cohere_stacks()	2021-03-08 11:14:27 -05:00
xtensa-asm2.h	xtensa: add support for thread local storage	2020-10-24 10:52:00 -07:00