zephyr/arch/x86/core/ia32.cmake
Tomasz Bursztyka 5e4e0298e9 arch/x86: Generalize cache manipulation functions
We assume that all x86 CPUs do have clflush instructions.
And the cache line size is now provided through DTS.

So detecting clflush instruction as well as the cache line size is no
longer required at runtime and thus removed.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-02-15 09:43:30 -05:00

39 lines
1.1 KiB
CMake

# Copyright (c) 2019 Intel Corp.
# SPDX-License-Identifier: Apache-2.0
if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
# We rely on GAS for assembling, so don't use the integrated assembler
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:-no-integrated-as>)
elseif(CMAKE_C_COMPILER_ID STREQUAL "GNU")
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:-Wa,--divide>)
endif()
zephyr_library_sources(
ia32/crt0.S
ia32/excstub.S
ia32/intstub.S
ia32/irq_manage.c
ia32/swap.S
ia32/thread.c
)
zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD ia32/irq_offload.c)
zephyr_library_sources_ifdef(CONFIG_X86_USERSPACE ia32/userspace.S)
zephyr_library_sources_ifdef(CONFIG_LAZY_FPU_SHARING ia32/float.c)
zephyr_library_sources_ifdef(CONFIG_GDBSTUB ia32/gdbstub.c)
zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP ia32/coredump.c)
zephyr_library_sources_ifdef(
CONFIG_X86_USE_THREAD_LOCAL_STORAGE
ia32/tls.c
)
# Last since we declare default exception handlers here
zephyr_library_sources(ia32/fatal.c)
zephyr_library_sources_ifdef(
CONFIG_X86_FP_USE_SOFT_FLOAT
ia32/soft_float_stubs.c
)