542a7fa25d
The IRQ handler has had a major changes to manage syscall, reschedule and interrupt from user thread and stack guard. Add userspace support: - Use a global variable to know if the current execution is user or machine. The location of this variable is read only for all user thread and read/write for kernel thread. - Memory shared is supported. - Use dynamic allocation to optimize PMP slot usage. If the area size is a power of 2, only one PMP slot is used, else 2 are used. Add stack guard support: - Use MPRV bit to force PMP rules to machine mode execution. - IRQ stack have a locked stack guard to avoid re-write PMP configuration registers for each interruption and then win some cycle. - The IRQ stack is used as "temporary" stack at the beginning of IRQ handler to save current ESF. That avoid to trigger write fault on thread stack during store ESF which that call IRQ handler to infinity. - A stack guard is also setup for privileged stack of a user thread. Thread: - A PMP setup is specific to each thread. PMP setup are saved in each thread structure to improve reschedule performance. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
143 lines
3.7 KiB
C
143 lines
3.7 KiB
C
/*
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* Copyright (c) 2020 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef CORE_PMP_H_
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#define CORE_PMP_H_
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/* Configuration register flags (cfg_val)*/
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#define PMP_R 0x01 /* Allow read */
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#define PMP_W 0x02 /* Allow write */
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#define PMP_X 0x04 /* Allow execute */
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#define PMP_A 0x18 /* Address-matching mode field */
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#define PMP_L 0x80 /* PMP entry is locked */
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#define PMP_OFF 0x00 /* Null region */
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#define PMP_TOR 0x08 /* Top of range */
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#define PMP_NA4 0x10 /* Naturally aligned four-byte region */
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#define PMP_NAPOT 0x18 /* Naturally aligned power-of-two region */
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#define PMP_SHIFT_ADDR 2
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#define PMP_TYPE_MASK 0x18
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#define TO_PMP_ADDR(addr) ((addr) >> PMP_SHIFT_ADDR)
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#define FROM_PMP_ADDR(addr) ((addr) << PMP_SHIFT_ADDR)
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#define TO_NAPOT_RANGE(size) (((size) - 1) >> 1)
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#define TO_PMP_NAPOT(addr, size) TO_PMP_ADDR(addr | \
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TO_NAPOT_RANGE(size))
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#ifdef CONFIG_PMP_STACK_GUARD
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#define PMP_GUARD_ALIGN_AND_SIZE CONFIG_PMP_STACK_GUARD_MIN_SIZE
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#else
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#define PMP_GUARD_ALIGN_AND_SIZE 0
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#endif /* CONFIG_PMP_STACK_GUARD */
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#ifdef CONFIG_RISCV_PMP
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/*
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* @brief Set a Physical Memory Protection slot
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*
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* Configure a memory region to be secured by one of the 16 PMP entries.
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*
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* @param index Number of the targeted PMP entrie (0 to 15 only).
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* @param cfg_val Configuration value (cf datasheet or defined flags)
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* @param addr_val Address register value
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*
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* This function shall only be called from Secure state.
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*
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* @return -1 if bad argument, 0 otherwise.
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*/
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int z_riscv_pmp_set(unsigned int index, ulong_t cfg_val, ulong_t addr_val);
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/*
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* @brief Reset to 0 all PMP setup registers
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*/
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void z_riscv_pmp_clear_config(void);
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/*
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* @brief Print PMP setup register for info/debug
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*/
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void z_riscv_pmp_print(unsigned int index);
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#endif /* CONFIG_RISCV_PMP */
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#if defined(CONFIG_USERSPACE)
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/*
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* @brief Configure RISCV user thread access to the stack
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*
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* Determine and save allow access setup in thread structure.
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*
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* @param thread Thread info data pointer.
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*/
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void z_riscv_init_user_accesses(struct k_thread *thread);
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/*
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* @brief Apply RISCV user thread access to the stack
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*
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* Write user access setup saved in this thread structure.
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*
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* @param thread Thread info data pointer.
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*/
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void z_riscv_configure_user_allowed_stack(struct k_thread *thread);
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/*
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* @brief Add a new RISCV stack access
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*
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* Add a new memory permission area in the existing
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* pmp setup of the thread.
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*
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* @param thread Thread info data pointer.
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* @param addr Start address of the memory area.
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* @param size Size of the memory area.
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* @param flags Pemissions: PMP_R, PMP_W, PMP_X, PMP_L
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*/
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void z_riscv_pmp_add_dynamic(struct k_thread *thread,
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ulong_t addr,
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ulong_t size,
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unsigned char flags);
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#endif /* CONFIG_USERSPACE */
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#ifdef CONFIG_PMP_STACK_GUARD
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/*
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* @brief Configure RISCV stack guard for interrupt stack
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*
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* Write PMP registers to prevent RWX access from all privilege mode.
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*/
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void z_riscv_configure_interrupt_stack_guard(void);
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/*
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* @brief Configure RISCV stack guard
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*
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* Determine and save stack guard setup in thread structure.
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*
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* @param thread Thread info data pointer.
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*/
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void z_riscv_init_stack_guard(struct k_thread *thread);
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/*
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* @brief Apply RISCV stack guard
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*
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* Write stack guard setup saved in this thread structure.
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*
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* @param thread Thread info data pointer.
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*/
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void z_riscv_configure_stack_guard(struct k_thread *thread);
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#endif /* CONFIG_PMP_STACK_GUARD */
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#if defined(CONFIG_PMP_STACK_GUARD) || defined(CONFIG_USERSPACE)
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/*
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* @brief Initialize thread PMP setup value to 0
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*
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* @param thread Thread info data pointer.
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*/
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void z_riscv_pmp_init_thread(struct k_thread *thread);
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#endif /* CONFIG_PMP_STACK_GUARD || CONFIG_USERSPACE */
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#endif /* CORE_PMP_H_ */
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