c3a2bbba16
nano_cpu_idle/nano_cpu_atomic_idle were not ported to the unified kernel, and only the old APIs were available. There was no real impact since, in the unified kernel, only the idle thread should really be doing power management. However, with a single-threaded kernel, these functions can be useful again. The kernel internals now make use of these APIs instead of the legacy ones. Change-Id: Ie8a6396ba378d3ddda27b8dd32fa4711bf53eb36 Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
112 lines
2.6 KiB
C
112 lines
2.6 KiB
C
/*
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* Copyright (c) 2013-2016 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Private kernel definitions (ARM)
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*
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* This file contains private kernel function definitions and various
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* other definitions for the ARM Cortex-M3 processor architecture.
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*
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* This file is also included by assembly language files which must #define
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* _ASMLANGUAGE before including this header file. Note that kernel
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* assembly source files obtains structure offset values via "absolute symbols"
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* in the offsets.o module.
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*/
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/* this file is only meant to be included by kernel_structs.h */
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#ifndef _kernel_arch_func__h_
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#define _kernel_arch_func__h_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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extern void _FaultInit(void);
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extern void _CpuIdleInit(void);
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static ALWAYS_INLINE void nanoArchInit(void)
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{
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_InterruptStackSetup();
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_ExcSetup();
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_FaultInit();
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_CpuIdleInit();
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}
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static ALWAYS_INLINE void
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_arch_switch_to_main_thread(char *main_stack, size_t main_stack_size,
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_thread_entry_t _main)
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{
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/* get high address of the stack, i.e. its start (stack grows down) */
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char *start_of_main_stack;
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start_of_main_stack = main_stack + main_stack_size;
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start_of_main_stack = (void *)STACK_ROUND_DOWN(start_of_main_stack);
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_current = (void *)main_stack;
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/* the ready queue cache already contains the main thread */
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__asm__ __volatile__(
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/* move to main() thread stack */
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"msr PSP, %0 \t\n"
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/* unlock interrupts */
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#ifdef CONFIG_CPU_CORTEX_M0_M0PLUS
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"cpsie i \t\n"
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#else
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"movs %%r1, #0 \n\t"
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"msr BASEPRI, %%r1 \n\t"
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#endif
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/* branch to _thread_entry(_main, 0, 0, 0) */
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"mov %%r0, %1 \n\t"
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"bx %2 \t\n"
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/* never gets here */
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:
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: "r"(start_of_main_stack),
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"r"(_main), "r"(_thread_entry)
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: "r0", "r1", "sp"
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);
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CODE_UNREACHABLE;
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}
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static ALWAYS_INLINE void
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_set_thread_return_value(struct k_thread *thread, unsigned int value)
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{
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thread->arch.swap_return_value = value;
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}
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extern void k_cpu_atomic_idle(unsigned int key);
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#define _is_in_isr() _IsInIsr()
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extern void _IntLibInit(void);
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _kernel_arch_func__h_ */
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