3b00571160
Record benchmark results into a CSV file that can be used for tracking. The data will be available in recording.csv in the build directory. For example: cat recording.csv metric,cycles,nanoseconds Average thread context switch using yield,11654,11654 Average context switch time between threads (coop),21149,21149 Switch from ISR back to interrupted thread,4928,4927 Time from ISR to executing a different thread,3872,3871 Time to create a thread (without start),4224,4223 Time to start a thread,10784,10783 Time to suspend a thread,10400,10399 Time to resume a thread,10688,10687 Time to abort a thread (not running),1536,1535 Average semaphore signal time,3424,3424 Average semaphore test time,1344,1344 Semaphore take time (context switch),12736,12735 Semaphore give time (context switch),17568,17567 Average time to lock a mutex,1632,1632 Average time to unlock a mutex,4738,4738 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
34 lines
1.1 KiB
YAML
34 lines
1.1 KiB
YAML
tests:
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benchmark.kernel.latency:
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arch_allow: x86 arm riscv32 riscv64
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# FIXME: no DWT and no RTC_TIMER for qemu_cortex_m0
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platform_exclude: qemu_x86_64 qemu_cortex_m0 m2gl025_miv
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filter: CONFIG_PRINTK and not CONFIG_SOC_FAMILY_STM32
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tags: benchmark
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harness: console
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harness_config:
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type: one_line
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record:
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regex: "(?P<metric>.*):(?P<cycles>.*) cycles ,(?P<nanoseconds>.*) ns"
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regex:
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- "PROJECT EXECUTION SUCCESSFUL"
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# Cortex-M has 24bit systick, so default 1 TICK per seconds
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# is achievable only if frequency is below 0x00FFFFFF (around 16MHz)
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# 20 Ticks per secondes allows a frequency up to 335544300Hz (335MHz)
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benchmark.kernel.latency.stm32:
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filter: CONFIG_PRINTK and CONFIG_SOC_FAMILY_STM32
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# FIXME: no DWT and no RTC_TIMER
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platform_exclude: qemu_cortex_m0
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tags: benchmark
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extra_configs:
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- CONFIG_SYS_CLOCK_TICKS_PER_SEC=20
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harness: console
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harness_config:
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type: one_line
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record:
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regex: "(?P<metric>.*):(?P<cycles>.*) cycles ,(?P<nanoseconds>.*) ns"
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regex:
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- "PROJECT EXECUTION SUCCESSFUL"
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