Due to the use of gperf to generate hash table for kobjects, the addresses of these kobjects cannot change during the last few phases of linking (especially between zephyr_prebuilt.elf and zephyr.elf). Because of this, the gperf generated data needs to be placed at the end of memory to avoid pushing symbols around in memory. This prevents moving these generated blocks to earlier sections, for example, pinned data section needed for demand paging. So create placeholders for use in intermediate linking to reserve space for these generated blocks. Due to uncertainty on the size of these blocks, more space is being reserved which could result in wasted space. Though, this retains the use of hash table for faster lookup. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
230 lines
5.2 KiB
Plaintext
230 lines
5.2 KiB
Plaintext
/*
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* Copyright (c) 2020 Synopsys.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Common parts of the linker scripts for the ARCv2 targets for
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* GNU and MWDT toolchains.
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*/
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#include <linker/sections.h>
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#include <linker/linker-defs.h>
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#include <linker/linker-tool.h>
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/* physical address of RAM */
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#ifdef CONFIG_HARVARD
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#define ROMABLE_REGION ICCM
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#define RAMABLE_REGION DCCM
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#else
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#if defined(CONFIG_XIP) && (FLASH_SIZE != 0)
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#define ROMABLE_REGION FLASH
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#define RAMABLE_REGION SRAM
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#else
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#define ROMABLE_REGION SRAM
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#define RAMABLE_REGION SRAM
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#endif
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#endif
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#ifdef CONFIG_ARC_MPU_ENABLE
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#if CONFIG_ARC_MPU_VER == 2
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#define MPU_MIN_SIZE 2048
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#elif CONFIG_ARC_MPU_VER == 4
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#define MPU_MIN_SIZE 32
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#endif
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#define MPU_MIN_SIZE_ALIGN . = ALIGN(MPU_MIN_SIZE);
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#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define MPU_ALIGN(region_size) \
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. = ALIGN(MPU_MIN_SIZE); \
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. = ALIGN( 1 << LOG2CEIL(region_size))
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#else
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#define MPU_ALIGN(region_size) \
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. = ALIGN(MPU_MIN_SIZE)
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#endif
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#else
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#define MPU_MIN_SIZE_ALIGN
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#define MPU_ALIGN(region_size) . = ALIGN(4)
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#endif
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#if defined(CONFIG_XIP)
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#define _DATA_IN_ROM __data_rom_start
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#else
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#define _DATA_IN_ROM
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#endif
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OUTPUT_ARCH(arc)
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ENTRY(CONFIG_KERNEL_ENTRY)
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MEMORY {
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#ifdef FLASH_START
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FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE
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#endif
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#ifdef ICCM_START
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ICCM (rwx) : ORIGIN = ICCM_START, LENGTH = ICCM_SIZE
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#endif
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#ifdef SRAM_START
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SRAM (rwx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE
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#endif
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#ifdef DCCM_START
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DCCM (rw) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE
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#endif
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/* Used by and documented in include/linker/intlist.ld */
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IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
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}
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SECTIONS {
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#include <linker/rel-sections.ld>
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GROUP_START(ROMABLE_REGION)
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SECTION_PROLOGUE(_TEXT_SECTION_NAME,,ALIGN(1024)) {
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_image_rom_start = .;
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_image_text_start = .;
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-rom-start.ld>
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*(.text .text.*)
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*(.gnu.linkonce.t.*)
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. = ALIGN(4);
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#include <linker/kobject-text.ld>
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_text_end = .;
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_image_rodata_start = .;
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#include <linker/common-rom.ld>
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#include <linker/thread-local-storage.ld>
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) {
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*(".rodata")
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*(".rodata.*")
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*(.gnu.linkonce.r.*)
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-rodata.ld>
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#include <linker/kobject-rom.ld>
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} GROUP_LINK_IN(ROMABLE_REGION)
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#ifdef __MWDT_LINKER_CMD__
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/* TODO: add mwdt specific ROM C++ sections */
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#else
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#include <linker/cplusplus-rom.ld>
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#endif /* __MWDT_LINKER_CMD__ */
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_image_rodata_end = .;
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MPU_ALIGN(_image_rodata_end - _image_rom_start);
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_image_rom_end = .;
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_image_rom_size = _image_rom_end - _image_rom_start;
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GROUP_END(ROMABLE_REGION)
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GROUP_START(RAMABLE_REGION)
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#include <app_data_alignment.ld>
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-ram-sections.ld>
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#if defined(CONFIG_USERSPACE)
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#define APP_SHARED_ALIGN MPU_MIN_SIZE_ALIGN
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#define SMEM_PARTITION_ALIGN MPU_ALIGN
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#include <app_smem.ld>
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_image_ram_start = _app_smem_start;
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_app_smem_size = _app_smem_end - _app_smem_start;
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_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
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#endif /* CONFIG_USERSPACE */
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SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) {
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MPU_MIN_SIZE_ALIGN
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/*
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* For performance, BSS section is assumed to be 4 byte aligned and
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* a multiple of 4 bytes
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*/
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. = ALIGN(4);
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__bss_start = .;
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_image_ram_start = .;
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__kernel_ram_start = .;
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*(".bss")
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*(".bss.*")
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*(COMMON)
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*(".kernel_bss.*")
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/*
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* BSP clears this memory in words only and doesn't clear any
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* potential left over bytes.
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*/
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__bss_end = ALIGN(4);
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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#include <linker/common-noinit.ld>
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SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,) {
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/* when XIP, .text is in ROM, but vector table must be at start of .data */
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__data_ram_start = .;
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*(".data")
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*(".data.*")
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*(".kernel.*")
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-rwdata.ld>
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__data_rom_start = LOADADDR(_DATA_SECTION_NAME);
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#include <linker/common-ram.ld>
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#include <linker/kobject-data.ld>
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#ifdef __MWDT_LINKER_CMD__
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/* TODO: add mwdt specific RAM C++ sections */
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#else
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#include <linker/cplusplus-ram.ld>
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#endif /* __MWDT_LINKER_CMD__ */
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__data_ram_end = .;
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MPU_MIN_SIZE_ALIGN
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/* Define linker symbols */
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_image_ram_end = .;
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_end = .; /* end of image */
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__kernel_ram_end = .;
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__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
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GROUP_END(RAMABLE_REGION)
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-sections.ld>
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#include <linker/debug-sections.ld>
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SECTION_PROLOGUE(.ARC.attributes, 0,) {
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KEEP(*(.ARC.attributes))
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KEEP(*(.gnu.attributes))
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}
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/DISCARD/ : {
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*(.note.GNU-stack)
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*(.got.plt)
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*(.igot.plt)
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*(.got)
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*(.igot)
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}
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}
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