Tim Lin f66cb34b13 dts: riscv: it8xxx2: fix default status of UART ... The default status of UART should set disabled. If UART needs to enable, it will be set in the dts of board level. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>		2021-05-12 13:01:56 -05:00
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it8xxx2.dtsi	dts: riscv: it8xxx2: fix default status of UART	2021-05-12 13:01:56 -05:00
microsemi-miv.dtsi	dts: bindings: add IRQ priority support for SiFive PLIC	2021-01-14 12:43:58 -06:00
riscv32-fe310.dtsi	pinmux: sifive: Convert SiFive pinmux to be devicetree based	2021-02-15 08:33:00 -05:00
riscv32-litex-vexriscv.dtsi	dts: Cleanup litex,clk binding	2021-02-03 13:41:47 -05:00
rv32m1_ri5cy.dtsi	soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL	2020-04-10 14:38:04 -05:00
rv32m1_zero_riscy.dtsi	soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL	2020-04-10 14:38:04 -05:00
rv32m1.dtsi	riscv: rv32m1: Rework device_get_binding for pinmux	2021-02-15 08:32:41 -05:00
virt.dtsi	soc/riscv: add the QEMU "RISC-V VirtIO board"	2021-01-15 13:06:33 -05:00