07160fa153
SPARC is an open and royalty free processor architecture. This commit provides SPARC architecture support to Zephyr. It is compatible with the SPARC V8 specification and the SPARC ABI and is independent of processor implementation. Functionality specific to SPRAC processor implementations should go in soc/sparc. One example is the LEON3 SOC which is part of this patch set. The architecture port is fully SPARC ABI compatible, including trap handlers and interrupt context. Number of implemented register windows can be configured. Some SPARC V8 processors borrow the CASA (compare-and-swap) atomic instructions from SPARC V9. An option has been defined in the architecture port to forward the corresponding code-generation option to the compiler. Stack size related config options have been defined in sparc/Kconfig to match the SPARC ABI. Co-authored-by: Nikolaus Huber <nikolaus.huber.melk@gmail.com> Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
65 lines
1.3 KiB
ArmAsm
65 lines
1.3 KiB
ArmAsm
/*
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* Copyright (c) 2019-2020 Cobham Gaisler AB
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <toolchain.h>
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#include <linker/sections.h>
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#include <arch/sparc/sparc.h>
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/* The trap table reset entry jumps to here. */
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GTEXT(__sparc_trap_reset)
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SECTION_FUNC(TEXT, __sparc_trap_reset)
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set __sparc_trap_table, %g1
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wr %g1, %tbr
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wr %g0, 4, %wim
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/* %psr := pil=0, et=0, cwp=1 */
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set (PSR_S | PSR_PS | 1), %g7
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wr %g7, %psr
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nop
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nop
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nop
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/* NOTE: wrpsr above may have changed the current register window. */
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/*
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* According to SPARC ABI, Chapter 3: The system marks the deepest
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* stack frame by setting the frame pointer to zero. No other frame's
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* %fp has a zero value.
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*/
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set z_interrupt_stacks, %o0
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set CONFIG_ISR_STACK_SIZE, %o2
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add %o0, %o2, %l2
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and %l2, 0xfffffff0, %l3
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sub %l3, 96, %sp
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clr %fp
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clr %i7
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#ifdef CONFIG_INIT_STACKS
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/* already have z_interrupt_stacks and CONFIG_ISR_STACK_SIZE in place */
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call memset
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mov 0xaa, %o1
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#endif
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call z_bss_zero
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nop
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/* Enable traps for the first time */
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/* %psr := pil=0, et=1, cwp=1 */
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wr %g7, PSR_ET, %psr
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nop
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nop
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nop
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call _PrepC
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nop
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/* We halt the system by generating a "trap in trap" condition. */
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GTEXT(arch_system_halt)
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SECTION_FUNC(TEXT, arch_system_halt)
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mov %o0, %g0
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mov %g1, %g0
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set 1, %g1
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ta 0x00
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