zephyr/drivers/timer
Andy Ross b69d0da82d arch/x86_64: New architecture added
This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr.
Only the basic architecture support needed to run 64 bit code is
added; no drivers are added, though a low-level console exists and is
wired to printk().

The support is built on top of a "X86 underkernel" layer, which can be
built in isolation as a unit test on a Linux host.

Limitations:

+ Right now the SDK lacks an x86_64 toolchain.  The build will fall
  back to a host toolchain if it finds no cross compiler defined,
  which is tested to work on gcc 8.2.1 right now.

+ No x87/SSE/AVX usage is allowed.  This is a stronger limitation than
  other architectures where the instructions work from one thread even
  if the context switch code doesn't support it.  We are passing
  -no-sse to prevent gcc from automatically generating SSE
  instructions for non-floating-point purposes, which has the side
  effect of changing the ABI.  Future work to handle the FPU registers
  will need to be combined with an "application" ABI distinct from the
  kernel one (or just to require USERSPACE).

+ Paging is enabled (it has to be in long mode), but is a 1:1 mapping
  of all memory.  No MMU/USERSPACE support yet.

+ We are building with -mno-red-zone for stack size reasons, but this
  is a valuable optimization.  Enabling it requires automatic stack
  switching, which requires a TSS, which means it has to happen after
  MMU support.

+ The OS runs in 64 bit mode, but for compatibility reasons is
  compiled to the 32 bit "X32" ABI.  So while the full 64 bit
  registers and instruction set are available, C pointers are 32 bits
  long and Zephyr is constrained to run in the bottom 4G of memory.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-01-11 15:18:52 -05:00
..
altera_avalon_timer_hal.c include/system_timer.h: Timer API cleanup 2018-10-16 15:03:10 -04:00
arcv2_timer0.c driver: arcv2_timer0: optimze the code 2018-12-07 17:08:15 -05:00
CMakeLists.txt board: posix: add native_posix board definition 2017-12-27 14:16:08 -05:00
cortex_m_systick.c drivers: timer: fix disable systick function 2018-12-12 15:40:36 -06:00
hpet.c drivers/timer/hpet: Completely new, simplified, tickless-capable driver 2018-11-13 17:10:07 -05:00
Kconfig arch/x86_64: New architecture added 2019-01-11 15:18:52 -05:00
legacy_api.h kernel: New timeout implementation 2018-10-16 15:03:10 -04:00
loapic_timer.c drivers: Add 'U' to unsigned variable assignments 2018-12-04 22:51:56 -05:00
native_posix_timer.c kernel: expose k_busy_wait() to user mode 2018-11-15 16:20:36 -05:00
nrf_rtc_timer.c drivers: timer: nrf_rtc_timer: fix handling for 24-bit counter 2018-11-30 15:05:25 +01:00
pulpino_timer.c drivers: Add 'U' to unsigned variable assignments 2018-12-04 22:51:56 -05:00
riscv_machine_timer.c drivers/timer: New, tickless-capable RISC-V machine timer driver 2018-11-13 17:10:07 -05:00
sys_clock_init.c drivers/timer: Add more default stubs 2018-11-13 17:10:07 -05:00
xtensa_sys_timer.c drivers/timer/xtensa_sys_timer: Add hook for old-style interrupt handling 2018-11-14 19:08:27 -05:00