b66ecc5765
The STM32L4x2 SoCs need to control the isolation of the USB features from VDDUSB. This is done through the PWR_CR2 bit USV. The STM32L4 HAL in stm32l4xx_ll_pwr.h wrongly checks for the PWR_CR2_PVME1 bit, which is only available on Cat. 3 devices. Replace the check by PWR_CR2_USV like it is already done in stm32l4xx_hal_pwr_ex.c. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> |
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| .. | ||
| debug | ||
| fs | ||
| hal | ||
| lib | ||
| CMakeLists.txt | ||
| Kconfig | ||