669c4d1738
DMA between a host os and processor (such as an x86 processor running linux) and vice versa is used and supported by Intel's HDA DMA Controller. This provides a method to transfer data, using hardware, between the host and the local processor running Zephyr. The enums added here are used to extend the dma_status direction enum which provides information back to the DMA user and driver the direction of the DMA transfer for a particular channel. This can then be used, where needed, to add logic around the direction of the transfer. In addition to adding the two directions it adds enums to account for cases where additional DMA directions that are IP and driver specific may exist. Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
645 lines
19 KiB
C
645 lines
19 KiB
C
/**
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* @file
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*
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* @brief Public APIs for the DMA drivers.
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*/
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/*
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* Copyright (c) 2016 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_H_
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#define ZEPHYR_INCLUDE_DRIVERS_DMA_H_
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#include <kernel.h>
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#include <device.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief DMA Interface
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* @defgroup dma_interface DMA Interface
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* @ingroup io_interfaces
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* @{
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*/
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enum dma_channel_direction {
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MEMORY_TO_MEMORY = 0x0,
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MEMORY_TO_PERIPHERAL,
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PERIPHERAL_TO_MEMORY,
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PERIPHERAL_TO_PERIPHERAL,
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HOST_TO_MEMORY,
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MEMORY_TO_HOST,
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/**
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* Number of all common channel directions.
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*/
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DMA_CHANNEL_DIRECTION_COMMON_COUNT,
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/**
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* This and higher values are dma controller or soc specific.
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* Refer to the specified dma driver header file.
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*/
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DMA_CHANNEL_DIRECTION_PRIV_START = DMA_CHANNEL_DIRECTION_COMMON_COUNT,
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/**
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* Maximum allowed value (3 bit field!)
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*/
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DMA_CHANNEL_DIRECTION_MAX = 0x7
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};
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/** Valid values for @a source_addr_adj and @a dest_addr_adj */
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enum dma_addr_adj {
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DMA_ADDR_ADJ_INCREMENT,
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DMA_ADDR_ADJ_DECREMENT,
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DMA_ADDR_ADJ_NO_CHANGE,
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};
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/* channel attributes */
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enum dma_channel_filter {
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DMA_CHANNEL_NORMAL, /* normal DMA channel */
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DMA_CHANNEL_PERIODIC, /* can be triggerred by periodic sources */
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};
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/**
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* @struct dma_block_config
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* @brief DMA block configuration structure.
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*
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* @param source_address is block starting address at source
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* @param source_gather_interval is the address adjustment at gather boundary
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* @param dest_address is block starting address at destination
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* @param dest_scatter_interval is the address adjustment at scatter boundary
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* @param dest_scatter_count is the continuous transfer count between scatter
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* boundaries
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* @param source_gather_count is the continuous transfer count between gather
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* boundaries
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*
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* @param block_size is the number of bytes to be transferred for this block.
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*
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* @param config is a bit field with the following parts:
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*
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* source_gather_en [ 0 ] - 0-disable, 1-enable.
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* dest_scatter_en [ 1 ] - 0-disable, 1-enable.
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* source_addr_adj [ 2 : 3 ] - 00-increment, 01-decrement,
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* 10-no change.
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* dest_addr_adj [ 4 : 5 ] - 00-increment, 01-decrement,
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* 10-no change.
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* source_reload_en [ 6 ] - reload source address at the end of
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* block transfer
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* 0-disable, 1-enable.
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* dest_reload_en [ 7 ] - reload destination address at the end
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* of block transfer
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* 0-disable, 1-enable.
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* fifo_mode_control [ 8 : 11 ] - How full of the fifo before transfer
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* start. HW specific.
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* flow_control_mode [ 12 ] - 0-source request served upon data
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* availability.
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* 1-source request postponed until
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* destination request happens.
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* reserved [ 13 : 15 ]
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*/
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struct dma_block_config {
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#ifdef CONFIG_DMA_64BIT
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uint64_t source_address;
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uint64_t dest_address;
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#else
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uint32_t source_address;
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uint32_t dest_address;
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#endif
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uint32_t source_gather_interval;
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uint32_t dest_scatter_interval;
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uint16_t dest_scatter_count;
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uint16_t source_gather_count;
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uint32_t block_size;
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struct dma_block_config *next_block;
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uint16_t source_gather_en : 1;
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uint16_t dest_scatter_en : 1;
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uint16_t source_addr_adj : 2;
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uint16_t dest_addr_adj : 2;
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uint16_t source_reload_en : 1;
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uint16_t dest_reload_en : 1;
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uint16_t fifo_mode_control : 4;
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uint16_t flow_control_mode : 1;
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uint16_t reserved : 3;
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};
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/**
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* @typedef dma_callback_t
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* @brief Callback function for DMA transfer completion
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*
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* If enabled, callback function will be invoked at transfer completion
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* or when error happens.
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*
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* @param dev Pointer to the DMA device calling the callback.
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* @param user_data A pointer to some user data or NULL
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* @param channel The channel number
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* @param status 0 on success, a negative errno otherwise
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*/
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typedef void (*dma_callback_t)(const struct device *dev, void *user_data,
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uint32_t channel, int status);
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/**
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* @struct dma_config
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* @brief DMA configuration structure.
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*
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* @param dma_slot [ 0 : 6 ] - which peripheral and direction
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* (HW specific)
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* @param channel_direction [ 7 : 9 ] - 000-memory to memory,
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* 001-memory to peripheral,
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* 010-peripheral to memory,
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* 011-peripheral to peripheral,
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* 100-host to memory
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* 101-memory to host
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* ...
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* @param complete_callback_en [ 10 ] - 0-callback invoked at completion only
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* 1-callback invoked at completion of
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* each block
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* @param error_callback_en [ 11 ] - 0-error callback enabled
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* 1-error callback disabled
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* @param source_handshake [ 12 ] - 0-HW, 1-SW
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* @param dest_handshake [ 13 ] - 0-HW, 1-SW
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* @param channel_priority [ 14 : 17 ] - DMA channel priority
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* @param source_chaining_en [ 18 ] - enable/disable source block chaining
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* 0-disable, 1-enable
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* @param dest_chaining_en [ 19 ] - enable/disable destination block
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* chaining.
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* 0-disable, 1-enable
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* @param linked_channel [ 20 : 26 ] - after channel count exhaust will
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* initiate a channel service request
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* at this channel
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* @param reserved [ 27 : 31 ]
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* @param source_data_size [ 0 : 15 ] - width of source data (in bytes)
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* @param dest_data_size [ 16 : 31 ] - width of dest data (in bytes)
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* @param source_burst_length [ 0 : 15 ] - number of source data units
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* @param dest_burst_length [ 16 : 31 ] - number of destination data units
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* @param block_count is the number of blocks used for block chaining, this
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* depends on availability of the DMA controller.
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* @param user_data private data from DMA client.
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* @param dma_callback see dma_callback_t for details
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*/
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struct dma_config {
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uint32_t dma_slot : 7;
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uint32_t channel_direction : 3;
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uint32_t complete_callback_en : 1;
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uint32_t error_callback_en : 1;
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uint32_t source_handshake : 1;
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uint32_t dest_handshake : 1;
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uint32_t channel_priority : 4;
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uint32_t source_chaining_en : 1;
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uint32_t dest_chaining_en : 1;
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uint32_t linked_channel : 7;
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uint32_t reserved : 5;
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uint32_t source_data_size : 16;
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uint32_t dest_data_size : 16;
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uint32_t source_burst_length : 16;
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uint32_t dest_burst_length : 16;
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uint32_t block_count;
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struct dma_block_config *head_block;
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void *user_data;
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dma_callback_t dma_callback;
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};
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/**
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* DMA runtime status structure
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*
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* busy - is current DMA transfer busy or idle
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* dir - DMA transfer direction
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* pending_length - data length pending to be transferred in bytes
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* or platform dependent.
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*
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*/
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struct dma_status {
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bool busy;
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enum dma_channel_direction dir;
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uint32_t pending_length;
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};
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/**
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* DMA context structure
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* Note: the dma_context shall be the first member
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* of DMA client driver Data, got by dev->data
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*
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* magic - magic code to identify the context
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* dma_channels - dma channels
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* atomic - driver atomic_t pointer
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*
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*/
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struct dma_context {
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int32_t magic;
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int dma_channels;
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atomic_t *atomic;
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};
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/* magic code to identify context content */
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#define DMA_MAGIC 0x47494749
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/**
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* @cond INTERNAL_HIDDEN
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*
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* These are for internal use only, so skip these in
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* public documentation.
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*/
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typedef int (*dma_api_config)(const struct device *dev, uint32_t channel,
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struct dma_config *config);
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#ifdef CONFIG_DMA_64BIT
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typedef int (*dma_api_reload)(const struct device *dev, uint32_t channel,
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uint64_t src, uint64_t dst, size_t size);
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#else
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typedef int (*dma_api_reload)(const struct device *dev, uint32_t channel,
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uint32_t src, uint32_t dst, size_t size);
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#endif
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typedef int (*dma_api_start)(const struct device *dev, uint32_t channel);
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typedef int (*dma_api_stop)(const struct device *dev, uint32_t channel);
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typedef int (*dma_api_suspend)(const struct device *dev, uint32_t channel);
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typedef int (*dma_api_resume)(const struct device *dev, uint32_t channel);
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typedef int (*dma_api_get_status)(const struct device *dev, uint32_t channel,
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struct dma_status *status);
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/**
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* @typedef dma_chan_filter
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* @brief channel filter function call
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*
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* filter function that is used to find the matched internal dma channel
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* provide by caller
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*
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* @param dev Pointer to the DMA device instance
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* @param channel the channel id to use
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* @param filter_param filter function parameter, can be NULL
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*
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* @retval True on filter matched otherwise return False.
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*/
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typedef bool (*dma_api_chan_filter)(const struct device *dev,
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int channel, void *filter_param);
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__subsystem struct dma_driver_api {
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dma_api_config config;
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dma_api_reload reload;
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dma_api_start start;
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dma_api_stop stop;
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dma_api_suspend suspend;
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dma_api_resume resume;
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dma_api_get_status get_status;
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dma_api_chan_filter chan_filter;
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};
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/**
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* @endcond
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*/
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/**
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* @brief Configure individual channel for DMA transfer.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to configure
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* @param config Data structure containing the intended configuration for the
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* selected channel
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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static inline int dma_config(const struct device *dev, uint32_t channel,
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struct dma_config *config)
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{
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const struct dma_driver_api *api =
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(const struct dma_driver_api *)dev->api;
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return api->config(dev, channel, config);
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}
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/**
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* @brief Reload buffer(s) for a DMA channel
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to configure
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* selected channel
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* @param src source address for the DMA transfer
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* @param dst destination address for the DMA transfer
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* @param size size of DMA transfer
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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#ifdef CONFIG_DMA_64BIT
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static inline int dma_reload(const struct device *dev, uint32_t channel,
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uint64_t src, uint64_t dst, size_t size)
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#else
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static inline int dma_reload(const struct device *dev, uint32_t channel,
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uint32_t src, uint32_t dst, size_t size)
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#endif
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{
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const struct dma_driver_api *api =
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(const struct dma_driver_api *)dev->api;
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if (api->reload) {
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return api->reload(dev, channel, src, dst, size);
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}
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return -ENOSYS;
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}
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/**
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* @brief Enables DMA channel and starts the transfer, the channel must be
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* configured beforehand.
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*
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* Implementations must check the validity of the channel ID passed in and
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* return -EINVAL if it is invalid.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel where the transfer will
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* be processed
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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__syscall int dma_start(const struct device *dev, uint32_t channel);
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static inline int z_impl_dma_start(const struct device *dev, uint32_t channel)
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{
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const struct dma_driver_api *api =
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(const struct dma_driver_api *)dev->api;
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return api->start(dev, channel);
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}
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/**
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* @brief Stops the DMA transfer and disables the channel.
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*
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* Implementations must check the validity of the channel ID passed in and
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* return -EINVAL if it is invalid.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel where the transfer was
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* being processed
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*
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* @retval 0 if successful.
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* @retval Negative errno code if failure.
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*/
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__syscall int dma_stop(const struct device *dev, uint32_t channel);
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static inline int z_impl_dma_stop(const struct device *dev, uint32_t channel)
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{
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const struct dma_driver_api *api =
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(const struct dma_driver_api *)dev->api;
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return api->stop(dev, channel);
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}
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/**
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* @brief Suspend a DMA channel transfer
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*
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* Implementations must check the validity of the channel state and ID passed
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* in and return -EINVAL if either are invalid.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to suspend
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*
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* @retval 0 If successful.
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* @retval -ENOSYS If not implemented.
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* @retval -EINVAL If invalid channel id or state.
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* @retval -errno Other negative errno code failure.
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*/
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__syscall int dma_suspend(const struct device *dev, uint32_t channel);
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static inline int z_impl_dma_suspend(const struct device *dev, uint32_t channel)
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{
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const struct dma_driver_api *api = (const struct dma_driver_api *)dev->api;
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if (api->suspend == NULL) {
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return -ENOSYS;
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}
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return api->suspend(dev, channel);
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}
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/**
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* @brief Resume a DMA channel transfer
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*
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* Implementations must check the validity of the channel state and ID passed
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* in and return -EINVAL if either are invalid.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel Numeric identification of the channel to resume
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*
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* @retval 0 If successful.
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* @retval -ENOSYS If not implemented
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* @retval -EINVAL If invalid channel id or state.
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* @retval -errno Other negative errno code failure.
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*/
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__syscall int dma_resume(const struct device *dev, uint32_t channel);
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static inline int z_impl_dma_resume(const struct device *dev, uint32_t channel)
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{
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const struct dma_driver_api *api = (const struct dma_driver_api *)dev->api;
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if (api->resume == NULL) {
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return -ENOSYS;
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}
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return api->resume(dev, channel);
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}
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/**
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* @brief request DMA channel.
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*
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* request DMA channel resources
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* return -EINVAL if there is no valid channel available.
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param filter_param filter function parameter
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*
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* @retval dma channel if successful.
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* @retval Negative errno code if failure.
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*/
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__syscall int dma_request_channel(const struct device *dev,
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void *filter_param);
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static inline int z_impl_dma_request_channel(const struct device *dev,
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void *filter_param)
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{
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int i = 0;
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int channel = -EINVAL;
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const struct dma_driver_api *api =
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(const struct dma_driver_api *)dev->api;
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/* dma_context shall be the first one in dev data */
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struct dma_context *dma_ctx = dev->data;
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if (dma_ctx->magic != DMA_MAGIC) {
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return channel;
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}
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for (i = 0; i < dma_ctx->dma_channels; i++) {
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if (!atomic_test_and_set_bit(dma_ctx->atomic, i)) {
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channel = i;
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if (api->chan_filter &&
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!api->chan_filter(dev, channel, filter_param)) {
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atomic_clear_bit(dma_ctx->atomic, channel);
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continue;
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}
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break;
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}
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}
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return channel;
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}
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/**
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* @brief release DMA channel.
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*
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* release DMA channel resources
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*
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* @param dev Pointer to the device structure for the driver instance.
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* @param channel channel number
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*
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*/
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__syscall void dma_release_channel(const struct device *dev,
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uint32_t channel);
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static inline void z_impl_dma_release_channel(const struct device *dev,
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uint32_t channel)
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{
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struct dma_context *dma_ctx = dev->data;
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if (dma_ctx->magic != DMA_MAGIC) {
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return;
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}
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if (channel < dma_ctx->dma_channels) {
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atomic_clear_bit(dma_ctx->atomic, channel);
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}
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}
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/**
|
|
* @brief DMA channel filter.
|
|
*
|
|
* filter channel by attribute
|
|
*
|
|
* @param dev Pointer to the device structure for the driver instance.
|
|
* @param channel channel number
|
|
* @param filter_param filter attribute
|
|
*
|
|
* @retval Negative errno code if not support
|
|
*
|
|
*/
|
|
__syscall int dma_chan_filter(const struct device *dev,
|
|
int channel, void *filter_param);
|
|
|
|
static inline int z_impl_dma_chan_filter(const struct device *dev,
|
|
int channel, void *filter_param)
|
|
{
|
|
const struct dma_driver_api *api =
|
|
(const struct dma_driver_api *)dev->api;
|
|
|
|
if (api->chan_filter) {
|
|
return api->chan_filter(dev, channel, filter_param);
|
|
}
|
|
|
|
return -ENOSYS;
|
|
}
|
|
|
|
/**
|
|
* @brief get current runtime status of DMA transfer
|
|
*
|
|
* Implementations must check the validity of the channel ID passed in and
|
|
* return -EINVAL if it is invalid or -ENOSYS if not supported.
|
|
*
|
|
* @param dev Pointer to the device structure for the driver instance.
|
|
* @param channel Numeric identification of the channel where the transfer was
|
|
* being processed
|
|
* @param stat a non-NULL dma_status object for storing DMA status
|
|
*
|
|
* @retval non-negative if successful.
|
|
* @retval Negative errno code if failure.
|
|
*/
|
|
static inline int dma_get_status(const struct device *dev, uint32_t channel,
|
|
struct dma_status *stat)
|
|
{
|
|
const struct dma_driver_api *api =
|
|
(const struct dma_driver_api *)dev->api;
|
|
|
|
if (api->get_status) {
|
|
return api->get_status(dev, channel, stat);
|
|
}
|
|
|
|
return -ENOSYS;
|
|
}
|
|
|
|
/**
|
|
* @brief Look-up generic width index to be used in registers
|
|
*
|
|
* WARNING: This look-up works for most controllers, but *may* not work for
|
|
* yours. Ensure your controller expects the most common register
|
|
* bit values before using this convenience function. If your
|
|
* controller does not support these values, you will have to write
|
|
* your own look-up inside the controller driver.
|
|
*
|
|
* @param size: width of bus (in bytes)
|
|
*
|
|
* @retval common DMA index to be placed into registers.
|
|
*/
|
|
static inline uint32_t dma_width_index(uint32_t size)
|
|
{
|
|
/* Check boundaries (max supported width is 32 Bytes) */
|
|
if (size < 1 || size > 32) {
|
|
return 0; /* Zero is the default (8 Bytes) */
|
|
}
|
|
|
|
/* Ensure size is a power of 2 */
|
|
if (!is_power_of_two(size)) {
|
|
return 0; /* Zero is the default (8 Bytes) */
|
|
}
|
|
|
|
/* Convert to bit pattern for writing to a register */
|
|
return find_msb_set(size);
|
|
}
|
|
|
|
/**
|
|
* @brief Look-up generic burst index to be used in registers
|
|
*
|
|
* WARNING: This look-up works for most controllers, but *may* not work for
|
|
* yours. Ensure your controller expects the most common register
|
|
* bit values before using this convenience function. If your
|
|
* controller does not support these values, you will have to write
|
|
* your own look-up inside the controller driver.
|
|
*
|
|
* @param burst: number of bytes to be sent in a single burst
|
|
*
|
|
* @retval common DMA index to be placed into registers.
|
|
*/
|
|
static inline uint32_t dma_burst_index(uint32_t burst)
|
|
{
|
|
/* Check boundaries (max supported burst length is 256) */
|
|
if (burst < 1 || burst > 256) {
|
|
return 0; /* Zero is the default (1 burst length) */
|
|
}
|
|
|
|
/* Ensure burst is a power of 2 */
|
|
if (!(burst & (burst - 1))) {
|
|
return 0; /* Zero is the default (1 burst length) */
|
|
}
|
|
|
|
/* Convert to bit pattern for writing to a register */
|
|
return find_msb_set(burst);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#include <syscalls/dma.h>
|
|
|
|
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_H_ */
|