Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and .yaml files. Will avoid failures with the new CI test in https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only checks changed files. Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst to get rid of the trailing blank line there. It was probably misplaced. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
29 lines
711 B
Plaintext
29 lines
711 B
Plaintext
# PCIe/new PCI configuration options
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# Copyright (c) 2019 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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menuconfig PCIE
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bool "Enable new PCI/PCIe support"
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depends on X86
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help
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This option enables support for new PCI(e) drivers.
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if PCIE
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config PCIE_MSI
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bool "Enable support for PCI(e) MSI"
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help
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Use Message-Signaled Interrupts where possible. With this option
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enabled, PCI(e) devices which support MSI will be configured (at
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runtime) to use them. This is typically required for PCIe devices
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to generate interrupts at all.
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config PCIE_SHELL
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bool "Enable PCIe/new PCI Shell"
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depends on SHELL
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help
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Enable commands for debugging PCI(e) using the built-in shell.
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endif # PCIE
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