In ARM architectures the entry_cpu_exception_extend calls svc #0 when trying to generate a `K_ERR_CPU_EXCEPTION`, however z_arm_svc calls z_do_oops with a stack frame only, and gets the reason from `r0`. This means that the test working was just lucky and running it with another compiler (or setting the value of r0 before the svc #0 call, made the test fail). Cortex-A/R 32-bit architectures was doing a BKPT, this works better but will not be a hard exception when debugger is attached. I switched all the Cortex 32-bits to the ARM specified undefined instruction. Also RISC-V has a designated unimp instruction that should be used to guarantee trap. Signed-off-by: Robin Kastberg <robin.kastberg@iar.com> |
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| .. | ||
| cache | ||
| common | ||
| condvar/condvar_api | ||
| context | ||
| device | ||
| early_sleep | ||
| events | ||
| fatal | ||
| fifo | ||
| fpu_sharing | ||
| gen_isr_table | ||
| interrupt | ||
| ipi_cascade | ||
| ipi_optimize | ||
| lifo | ||
| mbox | ||
| mem_heap/k_heap_api | ||
| mem_protect | ||
| mem_slab | ||
| mp | ||
| msgq | ||
| mutex | ||
| obj_core | ||
| obj_tracking | ||
| pending | ||
| pipe | ||
| poll | ||
| profiling/profiling_api | ||
| queue | ||
| sched | ||
| semaphore | ||
| sleep | ||
| smp | ||
| smp_abort | ||
| smp_boot_delay | ||
| smp_suspend | ||
| spinlock | ||
| stack/stack | ||
| threads | ||
| tickless/tickless_concept | ||
| timer | ||
| usage/thread_runtime_stats | ||
| workq | ||
| xip | ||