zephyr/include/arch
Anas Nashif 6e27478c3d benchmarking: remove execution benchmarking code
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.

For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.

Furthermore, much of the assembly code used had issues.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
..
arc ARC: linker: add more place for optimization 2020-09-05 10:22:56 -05:00
arm arch: arm64: Use _arch_switch() API 2020-09-05 12:06:38 +02:00
common ARCH: COMMON: split sys_io.h for MMIO & memory bits functions 2020-09-01 13:36:48 +02:00
nios2 arch: Apply dynamic IRQ API change 2020-09-02 13:48:13 +02:00
posix Revert "posix: linker: Wrap rodata and rwdata in sections." 2020-09-02 14:46:01 -04:00
riscv arch: Apply dynamic IRQ API change 2020-09-02 13:48:13 +02:00
x86 benchmarking: remove execution benchmarking code 2020-09-05 13:28:38 -05:00
xtensa arch: Apply dynamic IRQ API change 2020-09-02 13:48:13 +02:00
arch_inlines.h headers: Refactor kernel and arch headers. 2019-11-06 16:07:32 -08:00
cpu.h arch: arm64: Introduce ARM64 (AArch64) architecture 2020-02-01 08:08:43 -05:00
syscall.h x86: add system call functions for 64-bit 2020-01-13 16:35:10 -05:00