Anas Nashif 1813a33108 arch: arm: rename expection header ... Rename exception header and use the same name as all architecture ports. Signed-off-by: Anas Nashif <anas.nashif@intel.com>		2023-12-11 18:22:40 -05:00
..
arc-support-status.rst	doc: ARC: update ARC support status page regarding VPX support	2023-08-11 19:45:48 +00:00
arm_cortex_m.rst	arch: arm: rename expection header	2023-12-11 18:22:40 -05:00
index.rst	doc/hardware/arch: Add RISC-V information	2022-07-02 14:16:39 +02:00
risc-v.rst	doc/hardware/arch: Add RISC-V information	2022-07-02 14:16:39 +02:00
semihost.rst	doc: arch: semihost: fix broken link	2022-04-21 11:37:15 -04:00
x86.rst