zephyr/include/arch
Andrew Boie acda9bf9ce linker-tool-gcc: revise for MMU support
We need to do a few things differently if we are to support
a virtual memory map, i.e. CONFIG_MMU where CONFIG_KERNEL_VM_BASE
is not the same as CONFIG_SRAM_BASE_ADDRESS.

 - All sections must be specified with a VMA and LMA, where
   VMA is the virtual address and LMA is the physical memory
   location.
 - All sections must be specified with ALIGN_WITH_INPUT to
   keep VMAs and LMAs synchronized

To do this, the existing linker macros need some adjustment:

 - GROUP_LINK_IN undefined when CONFIG_KERNEL_VM_BASE is not
   the same as CONFIG_SRAM_BASE_ADDRESS.
 - New macro GROUP_ROM_LINK_IN for text/rodata sections
 - New macro GROUP_NOLOAD_LINK_IN for bss/noinit sections
 - Implicit ALIGN_WITH_INPUT for all sections

GROUP_FOLLOWS_AT is unused anywhere in the kernel for years
now and has been removed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
..
arc arch: arc: fix mpu version number 2021-02-24 08:57:35 -05:00
arm aarch64: mmu: Add initial support for memory domains 2021-03-16 08:43:19 -04:00
common ARCH: COMMON: split sys_io.h for MMIO & memory bits functions 2020-09-01 13:36:48 +02:00
nios2 license: add missing SPDX headers 2021-02-11 08:05:16 -05:00
posix Revert "posix: linker: Wrap rodata and rwdata in sections." 2020-09-02 14:46:01 -04:00
riscv include: arch: riscv: drop __soc_get_irq() declaration 2021-02-25 21:52:20 +03:00
sparc arch: sparc: fix memory barrier behavior of arch_irq_*lock 2021-01-26 13:42:17 -05:00
x86 linker-tool-gcc: revise for MMU support 2021-03-16 15:03:44 -04:00
xtensa arch/xtensa: Add non-HAL caching primitives 2021-03-08 11:14:27 -05:00
arch_inlines.h aarch64: add arch_curr_cpu 2021-03-06 07:36:37 -05:00
cpu.h arch: Add SPARC processor architecture 2020-11-13 14:53:55 -08:00
syscall.h aarch64: userspace: Introduce arch_is_user_context 2021-03-10 14:52:50 -05:00