13b3727e6e
Move all kernel testcases to tests/ and change Makefiles accordingly where applicable. Change-Id: I130cc3919174e93b7130d55fb101bed1d5d7552d Signed-off-by: Anas Nashif <anas.nashif@intel.com>
100 lines
2.9 KiB
C
100 lines
2.9 KiB
C
/* float_context.h - common definitions for the FPU sharing test application */
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/*
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* Copyright (c) 2011-2014 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _FLOATCONTEXT_H
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#define _FLOATCONTEXT_H
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/*
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* Each architecture must define the FP_REG_SET and FP_NONVOLATILE_REG_SET
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* structures, and tailor the architecture specific implementations of
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* _LoadAllFloatRegisters(), _StoreAllFloatRegisters(), and
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* _StoreNonVolatileFloatRegisters() to read/write from these structures.
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*/
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#if defined(CONFIG_ISA_IA32)
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#define FP_OPTION 0
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/*
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* In the future, the struct definitions may need to be refined based on the
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* specific IA-32 processor, but for now only the Pentium4 is supported.
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*
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* There exists 8 x 80 bit floating point registers (ST[0] -> ST[7]) and
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* 8 * 128 bit XMM registers (XMM[0] -> XMM[7]). All of these registers are
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* considered volatile across a function invocation.
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*/
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/* a single x87 FPU register in double extended format (80 bits) */
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typedef struct fpReg {
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unsigned char reg[10];
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} FP_REG;
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/* a single XMM register (128 bits) */
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typedef struct xmmReg {
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unsigned char reg[16];
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} XMM_REG;
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/* the set of volatile floating point registers */
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typedef struct fpVolatileRegSet {
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XMM_REG xmmRegs[8]; /* XMM[0] -> XMM[7] */
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FP_REG fpRegs[8]; /* ST[0] -> ST[7] */
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} FP_VOLATILE_REG_SET;
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/* the set of non-volatile floating point registers */
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typedef struct fpNonVolatileRegSet {
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/* this structure has been intentionally left blank */
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} FP_NONVOLATILE_REG_SET;
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#define SIZEOF_FP_VOLATILE_REG_SET sizeof(FP_VOLATILE_REG_SET)
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#define SIZEOF_FP_NONVOLATILE_REG_SET 0
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#else /* ! CONFIG_ISA_IA32 */
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#error Architecture needs to provide a definition for 'struct fpRegSet' \
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and 'struct fpNonVolatileRegSet'
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#endif /* CONFIG_ISA_IA32 */
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/* the set of ALL floating point registers */
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typedef struct fpRegSet {
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FP_VOLATILE_REG_SET fpVolRegSet;
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FP_NONVOLATILE_REG_SET fpNonVolRegSet;
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} FP_REG_SET;
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#define SIZEOF_FP_REG_SET \
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(SIZEOF_FP_VOLATILE_REG_SET + SIZEOF_FP_NONVOLATILE_REG_SET)
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/*
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* The following constants define the initial byte value used by the background
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* task, and the fiber when loading up the floating point registers.
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*/
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#define MAIN_FLOAT_REG_CHECK_BYTE (unsigned char)0xe5
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#define FIBER_FLOAT_REG_CHECK_BYTE (unsigned char)0xf9
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void _StoreNonVolatileFloatRegisters(FP_NONVOLATILE_REG_SET *pToBuffer);
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extern int fpu_sharing_error;
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#endif /* _FLOATRCONTEXT_H */
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