c880db1725
The CPU in Aspeed AST10x0 SOC is a ARM Cortex-M4 which doesn't internal cache memory. Aspeed implements an integrated system level cache to accelerate instruction and data memory accesses. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> |
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| .. | ||
| cache_aspeed.c | ||
| CMakeLists.txt | ||
| Kconfig | ||
| Kconfig.aspeed | ||