Daniel Leung 4e8abfcba7 x86: use TSC for timing information ... This changes the timing functions to use TSC to gather timing information instead of using the timer for scheduling as it provides higher resolution for timing information. Signed-off-by: Daniel Leung <daniel.leung@intel.com>		2021-01-22 11:05:30 -05:00
..
arc	arc: cache: Use new cache APIs	2021-01-19 14:31:02 -05:00
arm	debug: coredump: remove z_ prefix for stuff used outside subsys	2021-01-21 22:08:59 -05:00
common	isr_tables: adopt _irq_vector_table for using on 64bit architectures	2021-01-04 16:47:51 -08:00
nios2	kernel: Cleanup logger setup in kernel files	2020-11-27 09:56:34 -05:00
posix	posix: Add cpu_hold() function to better emulate code delay	2020-12-14 12:32:11 +01:00
riscv	arch/riscv: boost default stacks	2021-01-15 13:06:33 -05:00
sparc	sparc: do not set cmsis api Kconfigs	2021-01-20 16:45:31 -05:00
x86	x86: use TSC for timing information	2021-01-22 11:05:30 -05:00
xtensa	xtensa: don't build and run the reset handler twice	2021-01-13 18:17:40 -05:00
CMakeLists.txt	cmake: fix include directories to work with out-of-tree arch	2020-08-05 08:06:07 -04:00
Kconfig	Revert "arch: add KERNEL_VM_OFFSET"	2021-01-22 08:39:45 -05:00