Pieter De Gendt 97179c12bc soc: nxp_imx: Disable IVT/DCD when building for mcuboot ... The bootloader application itself should contain the IVT/DCD in the header, but the chainable application doesn't. The ROM_START_OFFSET defaults to 0x400 otherwise the linker alignment isn't taken into account. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>		2021-04-15 16:26:39 -05:00
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arc	ARC: Kconfig: cleanup CPU_ARCEM / CPU_ARCHS options usage	2021-03-25 07:23:02 -04:00
arm	soc: nxp_imx: Disable IVT/DCD when building for mcuboot	2021-04-15 16:26:39 -05:00
arm64	arch: arm64: Add MPU drivers to the build system	2021-04-13 07:47:44 -04:00
nios2
posix	posix: Add cpu_hold() function to better emulate code delay	2020-12-14 12:32:11 +01:00
riscv	ite: drivers/adc: add adc drivers on it8xxx2_evb platform	2021-04-13 13:01:56 -04:00
sparc	boards: set CPU_HAS_FPU on LEON3 soc and boards	2020-12-04 14:33:43 +02:00
x86	x86: remove CONFIG_CPU_MINUTEIA	2021-03-11 06:37:02 -05:00
xtensa	soc: intel_s1000: remove log and ztest XCC fixes	2021-03-26 11:19:52 -05:00
Kconfig	timing: introduce timing functions as a generic feature	2020-09-05 13:28:38 -05:00