Chen Xingyu e40315eb27 dts: riscv: Add reg-names to machine timer nodes ... This commit updates all relevant device tree source files using the riscv,machine-timer binding to explicitly define `reg-names` for the MTIME and MTIMECMP registers. This change ensures compatibility with the updated riscv_machine_timer driver, which now relies on `reg-names` to resolve register addresses instead of using fixed index positions. Signed-off-by: Chen Xingyu <hi@xingrz.me>		2025-05-27 19:04:22 +02:00
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gd32vf103.dtsi	dts: riscv: Add reg-names to machine timer nodes	2025-05-27 19:04:22 +02:00
gd32vf103X8.dtsi
gd32vf103Xb.dtsi