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zephyr/drivers/serial/uart_cmsdk_apb.c
Vincenzo Frascino bb1818a535 serial: Add driver for CMSDK (Cortex-M System Design Kit) APB UART 
Add driver for CMSDK APB UART ports. The driver implements RX and TX
functionalities. Data transmission is implemented using polling and
interrupts. The driver default configuration for the port is to use
8bit data transmission, 1 stop bit, no parity control.

The driver exposes a public uart driver API and allows to register up
to five UART devices: from 'UART_0' to 'UART_4'. The driver performs
the required pinmux, the clock control configuration is left to the
platform.

The driver has been verified to work with the Hello World sample
application on a Beetle Board.

Jira: ZEP-1245
Change-Id: I5baf78b7659aae2a574d8e66205e6fd5eb579133
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-11-11 20:39:54 +00:00

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/*
* Copyright (c) 2016 Linaro Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @brief Driver for UART on ARM CMSDK APB UART.
*
* UART has two wires for RX and TX, and does not provide CTS or RTS.
*/
#include <nanokernel.h>
#include <arch/cpu.h>
#include <misc/__assert.h>
#include <board.h>
#include <init.h>
#include <uart.h>
#include <sections.h>
/* UART registers struct */
struct uart_cmsdk_apb {
/* offset: 0x000 (r/w) data register */
volatile uint32_t data;
/* offset: 0x004 (r/w) status register */
volatile uint32_t state;
/* offset: 0x008 (r/w) control register */
volatile uint32_t ctrl;
union {
/* offset: 0x00c (r/ ) interrupt status register */
volatile uint32_t intstatus;
/* offset: 0x00c ( /w) interrupt clear register */
volatile uint32_t intclear;
};
/* offset: 0x010 (r/w) baudrate divider register */
volatile uint32_t bauddiv;
};
/* UART Bits */
/* CTRL Register */
#define UART_TX_EN (1 << 0)
#define UART_RX_EN (1 << 1)
#define UART_TX_IN_EN (1 << 2)
#define UART_RX_IN_EN (1 << 3)
#define UART_TX_OV_EN (1 << 4)
#define UART_RX_OV_EN (1 << 5)
#define UART_HS_TM_TX (1 << 6)
/* STATE Register */
#define UART_TX_BF (1 << 0)
#define UART_RX_BF (1 << 1)
#define UART_TX_B_OV (1 << 2)
#define UART_RX_B_OV (1 << 3)
/* INTSTATUS Register */
#define UART_TX_IN (1 << 0)
#define UART_RX_IN (1 << 1)
#define UART_TX_OV_IN (1 << 2)
#define UART_RX_OV_IN (1 << 3)
/* Device data structure */
struct uart_cmsdk_apb_dev_data {
uint32_t baud_rate; /* Baud rate */
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_irq_callback_t irq_cb;
#endif
};
/* convenience defines */
#define DEV_CFG(dev) \
((const struct uart_device_config * const)(dev)->config->config_info)
#define DEV_DATA(dev) \
((struct uart_cmsdk_apb_dev_data * const)(dev)->driver_data)
#define UART_STRUCT(dev) \
((volatile struct uart_cmsdk_apb *)(DEV_CFG(dev))->base)
static const struct uart_driver_api uart_cmsdk_apb_driver_api;
/**
* @brief Set the baud rate
*
* This routine set the given baud rate for the UART.
*
* @param dev UART device struct
*
* @return N/A
*/
static void baudrate_set(struct device *dev)
{
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
const struct uart_device_config * const dev_cfg = DEV_CFG(dev);
struct uart_cmsdk_apb_dev_data *const dev_data = DEV_DATA(dev);
/*
* If baudrate and/or sys_clk_freq are 0 the configuration remains
* unchanged. It can be useful in case that Zephyr it is run via
* a bootloader that brings up the serial and sets the baudrate.
*/
if ((dev_data->baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) {
/* calculate baud rate divisor */
uart->bauddiv = (dev_cfg->sys_clk_freq / dev_data->baud_rate);
}
}
/**
* @brief Initialize UART channel
*
* This routine is called to reset the chip in a quiescent state.
* It is assumed that this function is called only once per UART.
*
* @param dev UART device struct
*
* @return 0
*/
static int uart_cmsdk_apb_init(struct device *dev)
{
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
const struct uart_device_config * const dev_cfg = DEV_CFG(dev);
#endif
/* Set baud rate */
baudrate_set(dev);
/* Enable receiver and transmitter */
uart->ctrl = UART_RX_EN | UART_TX_EN;
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
dev_cfg->irq_config_func(dev);
#endif
return 0;
}
/**
* @brief Poll the device for input.
*
* @param dev UART device struct
* @param c Pointer to character
*
* @return 0 if a character arrived, -1 if the input buffer if empty.
*/
static int uart_cmsdk_apb_poll_in(struct device *dev, unsigned char *c)
{
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
/* If the receiver is not ready returns -1 */
if (!(uart->state & UART_RX_BF)) {
return -1;
}
/* got a character */
*c = (unsigned char)uart->data;
return 0;
}
/**
* @brief Output a character in polled mode.
*
* Checks if the transmitter is empty. If empty, a character is written to
* the data register.
*
* @param dev UART device struct
* @param c Character to send
*
* @return Sent character
*/
static unsigned char uart_cmsdk_apb_poll_out(struct device *dev,
unsigned char c)
{
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
/* Wait for transmitter to be ready */
while (uart->state & UART_TX_BF) {
; /* Wait */
}
/* Send a character */
uart->data = (uint32_t)c;
return c;
}
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
/**
* @brief Fill FIFO with data
*
* @param dev UART device struct
* @param tx_data Data to transmit
* @param len Number of bytes to send
*
* @return the number of characters that have been read
*/
static int uart_cmsdk_apb_fifo_fill(struct device *dev,
const uint8_t *tx_data, int len)
{
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
/* No hardware FIFO present */
if (len && !(uart->state & UART_TX_BF)) {
uart->data = *tx_data;
return 1;
}
return 0;
}
/**
* @brief Read data from FIFO
*
* @param dev UART device struct
* @param rx_data Pointer to data container
* @param size Container size in bytes
*
* @return the number of characters that have been read
*/
static int uart_cmsdk_apb_fifo_read(struct device *dev,
uint8_t *rx_data, const int size)
{
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
/* No hardware FIFO present */
if (size && uart->state & UART_RX_BF) {
*rx_data = (unsigned char)uart->data;
return 1;
}
return 0;
}
/**
* @brief Enable TX interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_tx_enable(struct device *dev)
{
UART_STRUCT(dev)->ctrl |= UART_TX_IN_EN;
}
/**
* @brief Disable TX interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_tx_disable(struct device *dev)
{
UART_STRUCT(dev)->ctrl &= ~UART_TX_IN_EN;
}
/**
* @brief Verify if Tx interrupt has been raised
*
* @param dev UART device struct
*
* @return 1 if an interrupt is ready, 0 otherwise
*/
static int uart_cmsdk_apb_irq_tx_ready(struct device *dev)
{
return !(UART_STRUCT(dev)->state & UART_TX_BF);
}
/**
* @brief Enable RX interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_rx_enable(struct device *dev)
{
UART_STRUCT(dev)->ctrl |= UART_RX_IN_EN;
}
/**
* @brief Disable RX interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_rx_disable(struct device *dev)
{
UART_STRUCT(dev)->ctrl &= ~UART_RX_IN_EN;
}
/**
* @brief Verify if Tx empty interrupt has been raised
*
* @param dev UART device struct
*
* @return 1 if an interrupt is ready, 0 otherwise
*/
static int uart_cmsdk_apb_irq_tx_empty(struct device *dev)
{
return uart_cmsdk_apb_irq_tx_ready(dev);
}
/**
* @brief Verify if Rx interrupt has been raised
*
* @param dev UART device struct
*
* @return 1 if an interrupt is ready, 0 otherwise
*/
static int uart_cmsdk_apb_irq_rx_ready(struct device *dev)
{
return UART_STRUCT(dev)->state & UART_RX_BF;
}
/**
* @brief Enable error interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_err_enable(struct device *dev)
{
ARG_UNUSED(dev);
}
/**
* @brief Disable error interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_err_disable(struct device *dev)
{
ARG_UNUSED(dev);
}
/**
* @brief Verify if Tx or Rx interrupt is pending
*
* @param dev UART device struct
*
* @return 1 if Tx or Rx interrupt is pending, 0 otherwise
*/
static int uart_cmsdk_apb_irq_is_pending(struct device *dev)
{
/* Return true if rx buffer full or tx buffer empty */
return (UART_STRUCT(dev)->state & (UART_RX_BF | UART_TX_BF))
!= UART_TX_BF;
}
/**
* @brief Update the interrupt status
*
* @param dev UART device struct
*
* @return always 1
*/
static int uart_cmsdk_apb_irq_update(struct device *dev)
{
return 1;
}
/**
* @brief Set the callback function pointer for an Interrupt.
*
* @param dev UART device structure
* @param cb Callback function pointer.
*
* @return N/A
*/
static void uart_cmsdk_apb_irq_callback_set(struct device *dev,
uart_irq_callback_t cb)
{
DEV_DATA(dev)->irq_cb = cb;
}
/**
* @brief Interrupt service routine.
*
* Calls the callback function, if exists.
*
* @param arg argument to interrupt service routine.
*
* @return N/A
*/
void uart_cmsdk_apb_isr(void *arg)
{
struct device *dev = arg;
volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
struct uart_cmsdk_apb_dev_data *data = DEV_DATA(dev);
/* Clear pending interrupts */
uart->intclear = UART_RX_IN | UART_TX_IN;
/* Verify if the callback has been registered */
if (data->irq_cb) {
data->irq_cb(dev);
}
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct uart_driver_api uart_cmsdk_apb_driver_api = {
.poll_in = uart_cmsdk_apb_poll_in,
.poll_out = uart_cmsdk_apb_poll_out,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.fifo_fill = uart_cmsdk_apb_fifo_fill,
.fifo_read = uart_cmsdk_apb_fifo_read,
.irq_tx_enable = uart_cmsdk_apb_irq_tx_enable,
.irq_tx_disable = uart_cmsdk_apb_irq_tx_disable,
.irq_tx_ready = uart_cmsdk_apb_irq_tx_ready,
.irq_rx_enable = uart_cmsdk_apb_irq_rx_enable,
.irq_rx_disable = uart_cmsdk_apb_irq_rx_disable,
.irq_tx_empty = uart_cmsdk_apb_irq_tx_empty,
.irq_rx_ready = uart_cmsdk_apb_irq_rx_ready,
.irq_err_enable = uart_cmsdk_apb_irq_err_enable,
.irq_err_disable = uart_cmsdk_apb_irq_err_disable,
.irq_is_pending = uart_cmsdk_apb_irq_is_pending,
.irq_update = uart_cmsdk_apb_irq_update,
.irq_callback_set = uart_cmsdk_apb_irq_callback_set,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
#ifdef CONFIG_UART_CMSDK_APB_PORT0
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_cmsdk_apb_irq_config_func_0(struct device *dev);
#endif
static const struct uart_device_config uart_cmsdk_apb_dev_cfg_0 = {
.base = (uint8_t *)CMSDK_APB_UART0,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_cmsdk_apb_irq_config_func_0,
#endif
};
static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_0 = {
.baud_rate = CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_cmsdk_apb_0,
CONFIG_UART_CMSDK_APB_PORT0_NAME,
&uart_cmsdk_apb_init,
&uart_cmsdk_apb_dev_data_0,
&uart_cmsdk_apb_dev_cfg_0, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_cmsdk_apb_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#ifdef CMSDK_APB_UART_0_IRQ
static void uart_cmsdk_apb_irq_config_func_0(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_0_IRQ,
CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_0),
0);
irq_enable(CMSDK_APB_UART_0_IRQ);
}
#else
static void uart_cmsdk_apb_irq_config_func_0(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_0_IRQ_TX,
CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_0),
0);
irq_enable(CMSDK_APB_UART_0_IRQ_TX);
IRQ_CONNECT(CMSDK_APB_UART_0_IRQ_RX,
CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_0),
0);
irq_enable(CMSDK_APB_UART_0_IRQ_RX);
}
#endif
#endif
#endif /* CONFIG_UART_CMSDK_APB_PORT0 */
#ifdef CONFIG_UART_CMSDK_APB_PORT1
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_cmsdk_apb_irq_config_func_1(struct device *dev);
#endif
static const struct uart_device_config uart_cmsdk_apb_dev_cfg_1 = {
.base = (uint8_t *)CMSDK_APB_UART1,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_cmsdk_apb_irq_config_func_1,
#endif
};
static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_1 = {
.baud_rate = CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_cmsdk_apb_1,
CONFIG_UART_CMSDK_APB_PORT1_NAME,
&uart_cmsdk_apb_init,
&uart_cmsdk_apb_dev_data_1,
&uart_cmsdk_apb_dev_cfg_1, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_cmsdk_apb_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#ifdef CMSDK_APB_UART_1_IRQ
static void uart_cmsdk_apb_irq_config_func_1(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_1_IRQ,
CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_1),
0);
irq_enable(CMSDK_APB_UART_1_IRQ);
}
#else
static void uart_cmsdk_apb_irq_config_func_1(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_1_IRQ_TX,
CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_1),
0);
irq_enable(CMSDK_APB_UART_1_IRQ_TX);
IRQ_CONNECT(CMSDK_APB_UART_1_IRQ_RX,
CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_1),
0);
irq_enable(CMSDK_APB_UART_1_IRQ_RX);
}
#endif
#endif
#endif /* CONFIG_UART_CMSDK_APB_PORT1 */
#ifdef CONFIG_UART_CMSDK_APB_PORT2
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_cmsdk_apb_irq_config_func_2(struct device *dev);
#endif
static const struct uart_device_config uart_cmsdk_apb_dev_cfg_2 = {
.base = (uint8_t *)CMSDK_APB_UART2,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_cmsdk_apb_irq_config_func_2,
#endif
};
static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_2 = {
.baud_rate = CONFIG_UART_CMSDK_APB_PORT2_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_cmsdk_apb_2,
CONFIG_UART_CMSDK_APB_PORT2_NAME,
&uart_cmsdk_apb_init,
&uart_cmsdk_apb_dev_data_2,
&uart_cmsdk_apb_dev_cfg_2, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_cmsdk_apb_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#ifdef CMSDK_APB_UART_2_IRQ
static void uart_cmsdk_apb_irq_config_func_2(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_2_IRQ,
CONFIG_UART_CMSDK_APB_PORT2_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_2),
0);
irq_enable(CMSDK_APB_UART_2_IRQ);
}
#else
static void uart_cmsdk_apb_irq_config_func_2(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_2_IRQ_TX,
CONFIG_UART_CMSDK_APB_PORT2_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_2),
0);
irq_enable(CMSDK_APB_UART_2_IRQ_TX);
IRQ_CONNECT(CMSDK_APB_UART_2_IRQ_RX,
CONFIG_UART_CMSDK_APB_PORT2_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_2),
0);
irq_enable(CMSDK_APB_UART_2_IRQ_RX);
}
#endif
#endif
#endif /* CONFIG_UART_CMSDK_APB_PORT2 */
#ifdef CONFIG_UART_CMSDK_APB_PORT3
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_cmsdk_apb_irq_config_func_3(struct device *dev);
#endif
static const struct uart_device_config uart_cmsdk_apb_dev_cfg_3 = {
.base = (uint8_t *)CMSDK_APB_UART3,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_cmsdk_apb_irq_config_func_3,
#endif
};
static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_3 = {
.baud_rate = CONFIG_UART_CMSDK_APB_PORT3_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_cmsdk_apb_3,
CONFIG_UART_CMSDK_APB_PORT3_NAME,
&uart_cmsdk_apb_init,
&uart_cmsdk_apb_dev_data_3,
&uart_cmsdk_apb_dev_cfg_3, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_cmsdk_apb_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#ifdef CMSDK_APB_UART_3_IRQ
static void uart_cmsdk_apb_irq_config_func_3(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_3_IRQ,
CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_3),
0);
irq_enable(CMSDK_APB_UART_3_IRQ);
}
#else
static void uart_cmsdk_apb_irq_config_func_3(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_3_IRQ_TX,
CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_3),
0);
irq_enable(CMSDK_APB_UART_3_IRQ_TX);
IRQ_CONNECT(CMSDK_APB_UART_3_IRQ_RX,
CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_3),
0);
irq_enable(CMSDK_APB_UART_3_IRQ_RX);
}
#endif
#endif
#endif /* CONFIG_UART_CMSDK_APB_PORT3 */
#ifdef CONFIG_UART_CMSDK_APB_PORT4
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_cmsdk_apb_irq_config_func_4(struct device *dev);
#endif
static const struct uart_device_config uart_cmsdk_apb_dev_cfg_4 = {
.base = (uint8_t *)CMSDK_APB_UART4,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_cmsdk_apb_irq_config_func_4,
#endif
};
static struct uart_cmsdk_apb_dev_data uart_cmsdk_apb_dev_data_4 = {
.baud_rate = CONFIG_UART_CMSDK_APB_PORT4_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_cmsdk_apb_3,
CONFIG_UART_CMSDK_APB_PORT4_NAME,
&uart_cmsdk_apb_init,
&uart_cmsdk_apb_dev_data_4,
&uart_cmsdk_apb_dev_cfg_4, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_cmsdk_apb_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#ifdef CMSDK_APB_UART_4_IRQ
static void uart_cmsdk_apb_irq_config_func_4(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_4_IRQ,
CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_4),
0);
irq_enable(CMSDK_APB_UART_4_IRQ);
}
#else
static void uart_cmsdk_apb_irq_config_func_4(struct device *dev)
{
IRQ_CONNECT(CMSDK_APB_UART_4_IRQ_TX,
CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_4),
0);
irq_enable(CMSDK_APB_UART_4_IRQ_TX);
IRQ_CONNECT(CMSDK_APB_UART_4_IRQ_RX,
CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI,
uart_cmsdk_apb_isr,
DEVICE_GET(uart_cmsdk_apb_4),
0);
irq_enable(CMSDK_APB_UART_4_IRQ_RX);
}
#endif
#endif
#endif /* CONFIG_UART_CMSDK_APB_PORT4 */
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