381cb25f63
An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Cache helper functions and defines (ARC)
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*
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* This file contains cache related functions and definitions for the
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* ARCv2 processor architecture.
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*/
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#ifndef _ARCV2_CACHE__H_
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#define _ARCV2_CACHE__H_
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#include <arch/cpu.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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/* i-cache defines for IC_CTRL register */
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#define IC_CACHE_ENABLE 0x00
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#define IC_CACHE_DISABLE 0x01
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#define IC_CACHE_DIRECT 0x00
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#define IC_CACHE_INDIRECT 0x20
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/*
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* @brief Initialize the I-cache
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*
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* Enables the i-cache and sets it to direct access mode.
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*/
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static ALWAYS_INLINE void _icache_setup(void)
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{
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uint32_t icache_config = (
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IC_CACHE_DIRECT | /* direct mapping (one-way assoc.) */
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IC_CACHE_ENABLE /* i-cache enabled */
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);
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uint32_t val;
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val = _arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
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val &= 0xff;
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if (val != 0) { /* is i-cache present? */
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/* configure i-cache */
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_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, icache_config);
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}
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}
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ARCV2_CACHE__H_ */
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