Nicolas Pitre 7f74825958 riscv: add a qemu_riscv64 board ... This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board. Memory is tight so a few tests had to be disabled due to the extra memory usage compared to qemu_riscv32. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>		2019-08-09 09:11:45 -05:00
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arc	board: emsdp: doc update and bug fixes	2019-08-08 11:48:39 +02:00
arm	soc: arm: nxp: ke1xf: add FlexTimer (FTM) module support	2019-08-09 07:32:43 -05:00
bindings	drivers: clock_control: mcux_mcg: add driver for NXP Kinetis MCG	2019-08-09 07:32:43 -05:00
common	dts: flash simulator cleanup	2019-04-26 04:04:19 -07:00
nios2	dts: nios2: Remove device_type = "memory" from SRAM nodes	2019-08-06 08:59:22 -04:00
posix	dts: posix: Add DTS support for POSIX architecture	2019-05-28 21:14:19 -04:00
riscv	riscv: add a qemu_riscv64 board	2019-08-09 09:11:45 -05:00
x86	x86: ia32: do not use the first megabyte	2019-08-07 12:50:53 -07:00
xtensa	dts: Add information about system bus frequency to the dts	2019-07-17 21:53:36 +02:00
Kconfig	license: cleanup: add SPDX Apache-2.0 license identifier	2019-04-07 08:45:22 -04:00