2b5723d455
Each backend can configure separately features like colors on/off, VT100 handling and so on. This can be very handy for planned MQTT backend. Shell will not send VT100 commands when VT100 is not enabled globally or for particular backend. Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
345 lines
8.7 KiB
C
345 lines
8.7 KiB
C
/*
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* Copyright (c) 2018 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <shell/shell_uart.h>
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#include <drivers/uart.h>
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#include <init.h>
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#include <logging/log.h>
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#include <net/buf.h>
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#define LOG_MODULE_NAME shell_uart
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LOG_MODULE_REGISTER(shell_uart);
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_RX_POLL_PERIOD
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#define RX_POLL_PERIOD K_MSEC(CONFIG_SHELL_BACKEND_SERIAL_RX_POLL_PERIOD)
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#else
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#define RX_POLL_PERIOD K_NO_WAIT
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#endif
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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NET_BUF_POOL_DEFINE(smp_shell_rx_pool, CONFIG_MCUMGR_SMP_SHELL_RX_BUF_COUNT,
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SMP_SHELL_RX_BUF_SIZE, 0, NULL);
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#endif /* CONFIG_MCUMGR_SMP_SHELL */
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SHELL_UART_DEFINE(shell_transport_uart,
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CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE,
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CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE);
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SHELL_DEFINE(shell_uart, CONFIG_SHELL_PROMPT_UART, &shell_transport_uart,
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CONFIG_SHELL_BACKEND_SERIAL_LOG_MESSAGE_QUEUE_SIZE,
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CONFIG_SHELL_BACKEND_SERIAL_LOG_MESSAGE_QUEUE_TIMEOUT,
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SHELL_FLAG_OLF_CRLF);
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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static void uart_rx_handle(const struct device *dev,
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const struct shell_uart *sh_uart)
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{
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uint8_t *data;
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uint32_t len;
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uint32_t rd_len;
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bool new_data = false;
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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struct smp_shell_data *const smp = &sh_uart->ctrl_blk->smp;
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#endif
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do {
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len = ring_buf_put_claim(sh_uart->rx_ringbuf, &data,
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sh_uart->rx_ringbuf->size);
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if (len > 0) {
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rd_len = uart_fifo_read(dev, data, len);
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/* If there is any new data to be either taken into
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* ring buffer or consumed by the SMP, signal the
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* shell_thread.
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*/
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if (rd_len > 0) {
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new_data = true;
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}
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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/* Divert bytes from shell handling if it is
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* part of an mcumgr frame.
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*/
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size_t i = smp_shell_rx_bytes(smp, data, rd_len);
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rd_len -= i;
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if (rd_len) {
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for (uint32_t j = 0; j < rd_len; j++) {
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data[j] = data[i + j];
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}
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}
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#endif /* CONFIG_MCUMGR_SMP_SHELL */
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int err = ring_buf_put_finish(sh_uart->rx_ringbuf,
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rd_len);
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(void)err;
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__ASSERT_NO_MSG(err == 0);
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} else {
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uint8_t dummy;
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/* No space in the ring buffer - consume byte. */
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LOG_WRN("RX ring buffer full.");
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rd_len = uart_fifo_read(dev, &dummy, 1);
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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/* If successful in getting byte from the fifo, try
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* feeding it to SMP as a part of mcumgr frame.
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*/
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if ((rd_len != 0) &&
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(smp_shell_rx_bytes(smp, &dummy, 1) == 1)) {
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new_data = true;
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}
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#endif /* CONFIG_MCUMGR_SMP_SHELL */
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}
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} while (rd_len && (rd_len == len));
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if (new_data) {
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sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_RX_RDY,
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sh_uart->ctrl_blk->context);
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}
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}
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static void uart_dtr_wait(const struct device *dev)
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{
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if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_CHECK_DTR)) {
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int dtr, err;
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while (true) {
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err = uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr);
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if (err == -ENOSYS || err == -ENOTSUP) {
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break;
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}
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if (dtr) {
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break;
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}
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/* Give CPU resources to low priority threads. */
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k_sleep(K_MSEC(100));
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}
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}
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}
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static void uart_tx_handle(const struct device *dev,
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const struct shell_uart *sh_uart)
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{
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uint32_t len;
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int err;
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const uint8_t *data;
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len = ring_buf_get_claim(sh_uart->tx_ringbuf, (uint8_t **)&data,
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sh_uart->tx_ringbuf->size);
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if (len) {
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/* Wait for DTR signal before sending anything to output. */
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uart_dtr_wait(dev);
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len = uart_fifo_fill(dev, data, len);
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err = ring_buf_get_finish(sh_uart->tx_ringbuf, len);
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__ASSERT_NO_MSG(err == 0);
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} else {
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uart_irq_tx_disable(dev);
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sh_uart->ctrl_blk->tx_busy = 0;
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}
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sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_TX_RDY,
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sh_uart->ctrl_blk->context);
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}
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static void uart_callback(const struct device *dev, void *user_data)
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{
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const struct shell_uart *sh_uart = (struct shell_uart *)user_data;
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uart_irq_update(dev);
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if (uart_irq_rx_ready(dev)) {
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uart_rx_handle(dev, sh_uart);
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}
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if (uart_irq_tx_ready(dev)) {
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uart_tx_handle(dev, sh_uart);
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}
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}
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#endif /* CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN */
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static void uart_irq_init(const struct shell_uart *sh_uart)
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{
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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const struct device *dev = sh_uart->ctrl_blk->dev;
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ring_buf_reset(sh_uart->tx_ringbuf);
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ring_buf_reset(sh_uart->rx_ringbuf);
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sh_uart->ctrl_blk->tx_busy = 0;
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uart_irq_callback_user_data_set(dev, uart_callback, (void *)sh_uart);
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uart_irq_rx_enable(dev);
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#endif
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}
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static void timer_handler(struct k_timer *timer)
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{
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uint8_t c;
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const struct shell_uart *sh_uart = k_timer_user_data_get(timer);
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while (uart_poll_in(sh_uart->ctrl_blk->dev, &c) == 0) {
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if (ring_buf_put(sh_uart->rx_ringbuf, &c, 1) == 0U) {
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/* ring buffer full. */
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LOG_WRN("RX ring buffer full.");
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}
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sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_RX_RDY,
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sh_uart->ctrl_blk->context);
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}
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}
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static int init(const struct shell_transport *transport,
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const void *config,
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shell_transport_handler_t evt_handler,
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void *context)
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{
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const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
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sh_uart->ctrl_blk->dev = (const struct device *)config;
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sh_uart->ctrl_blk->handler = evt_handler;
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sh_uart->ctrl_blk->context = context;
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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sh_uart->ctrl_blk->smp.buf_pool = &smp_shell_rx_pool;
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k_fifo_init(&sh_uart->ctrl_blk->smp.buf_ready);
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#endif
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if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN)) {
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uart_irq_init(sh_uart);
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} else {
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k_timer_init(sh_uart->timer, timer_handler, NULL);
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k_timer_user_data_set(sh_uart->timer, (void *)sh_uart);
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k_timer_start(sh_uart->timer, RX_POLL_PERIOD, RX_POLL_PERIOD);
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}
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return 0;
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}
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static int uninit(const struct shell_transport *transport)
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{
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const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
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if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN)) {
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const struct device *dev = sh_uart->ctrl_blk->dev;
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uart_irq_tx_disable(dev);
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uart_irq_rx_disable(dev);
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} else {
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k_timer_stop(sh_uart->timer);
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}
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return 0;
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}
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static int enable(const struct shell_transport *transport, bool blocking_tx)
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{
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const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
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sh_uart->ctrl_blk->blocking_tx = blocking_tx;
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if (blocking_tx) {
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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uart_irq_tx_disable(sh_uart->ctrl_blk->dev);
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#endif
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}
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return 0;
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}
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static void irq_write(const struct shell_uart *sh_uart, const void *data,
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size_t length, size_t *cnt)
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{
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*cnt = ring_buf_put(sh_uart->tx_ringbuf, data, length);
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if (atomic_set(&sh_uart->ctrl_blk->tx_busy, 1) == 0) {
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#ifdef CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
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uart_irq_tx_enable(sh_uart->ctrl_blk->dev);
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#endif
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}
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}
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static int write(const struct shell_transport *transport,
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const void *data, size_t length, size_t *cnt)
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{
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const struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
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const uint8_t *data8 = (const uint8_t *)data;
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if (IS_ENABLED(CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN) &&
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!sh_uart->ctrl_blk->blocking_tx) {
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irq_write(sh_uart, data, length, cnt);
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} else {
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for (size_t i = 0; i < length; i++) {
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uart_poll_out(sh_uart->ctrl_blk->dev, data8[i]);
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}
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*cnt = length;
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sh_uart->ctrl_blk->handler(SHELL_TRANSPORT_EVT_TX_RDY,
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sh_uart->ctrl_blk->context);
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}
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return 0;
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}
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static int read(const struct shell_transport *transport,
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void *data, size_t length, size_t *cnt)
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{
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struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
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*cnt = ring_buf_get(sh_uart->rx_ringbuf, data, length);
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return 0;
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}
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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static void update(const struct shell_transport *transport)
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{
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struct shell_uart *sh_uart = (struct shell_uart *)transport->ctx;
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smp_shell_process(&sh_uart->ctrl_blk->smp);
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}
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#endif /* CONFIG_MCUMGR_SMP_SHELL */
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const struct shell_transport_api shell_uart_transport_api = {
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.init = init,
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.uninit = uninit,
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.enable = enable,
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.write = write,
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.read = read,
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#ifdef CONFIG_MCUMGR_SMP_SHELL
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.update = update,
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#endif /* CONFIG_MCUMGR_SMP_SHELL */
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};
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static int enable_shell_uart(const struct device *arg)
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{
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ARG_UNUSED(arg);
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const struct device *dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_shell_uart));
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bool log_backend = CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL > 0;
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uint32_t level =
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(CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL > LOG_LEVEL_DBG) ?
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CONFIG_LOG_MAX_LEVEL : CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL;
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static const struct shell_backend_config_flags cfg_flags =
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SHELL_DEFAULT_BACKEND_CONFIG_FLAGS;
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if (!device_is_ready(dev)) {
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return -ENODEV;
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}
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if (IS_ENABLED(CONFIG_MCUMGR_SMP_SHELL)) {
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smp_shell_init();
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}
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shell_init(&shell_uart, dev, cfg_flags, log_backend, level);
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return 0;
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}
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SYS_INIT(enable_shell_uart, POST_KERNEL,
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CONFIG_SHELL_BACKEND_SERIAL_INIT_PRIORITY);
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const struct shell *shell_backend_uart_get_ptr(void)
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{
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return &shell_uart;
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}
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