Martin Åberg a0a875026b arch/riscv: semantic ESF printer ... Present ESF registers as columns of argument registers and temporary registers. Also print 64-bit values in full width. It now looks like this: E: mcause: 2, Illegal instruction E: a0: 00000000 t0: 12345678 E: a1: 00000000 t1: 00000000 E: a2: 00000000 t2: 00000000 E: a3: 00000000 t3: 0badc0de E: a4: 00000000 t4: 00000000 E: a5: 8000733c t5: deadbeef E: a6: 00000000 t6: 00000000 E: a7: 00000000 E: tp: 00000000 E: ra: 80000d9a gp: 00000000 E: mepc: 8000733c E: mstatus: 00001880 Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>		2021-01-15 13:06:33 -05:00
..
arc	arc: power: Remove dead code	2021-01-08 06:49:43 -05:00
arm	aarch64: Fix alignment fault on z_bss_zero()	2021-01-14 13:37:47 -08:00
common	isr_tables: adopt _irq_vector_table for using on 64bit architectures	2021-01-04 16:47:51 -08:00
nios2	kernel: Cleanup logger setup in kernel files	2020-11-27 09:56:34 -05:00
posix	posix: Add cpu_hold() function to better emulate code delay	2020-12-14 12:32:11 +01:00
riscv	arch/riscv: semantic ESF printer	2021-01-15 13:06:33 -05:00
sparc	SPARC: add FPU support	2020-12-04 14:33:43 +02:00
x86	x86: early_serial: Suppress output attempts prior to init	2021-01-15 11:01:23 -05:00
xtensa	xtensa: don't build and run the reset handler twice	2021-01-13 18:17:40 -05:00
CMakeLists.txt	cmake: fix include directories to work with out-of-tree arch	2020-08-05 08:06:07 -04:00
Kconfig	power: Remove not used build option	2021-01-08 06:49:43 -05:00