58d8afb476
Add a level 2 interrupt controller for the RV32M1 SoC. This uses the INTMUX peripheral. As a first customer, convert the timer driver over to using this, adding nodes for the LPTMR peripherals. This lets users select the timer instance they want to use, and what intmux channel they want to route its interrupt to, using DT overlays. Signed-off-by: Marti Bolivar <marti@foundries.io> Signed-off-by: Mike Scott <mike@foundries.io> |
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| .. | ||
| arcv2_irq_unit.c | ||
| cavs_ictl.c | ||
| cavs_ictl.h | ||
| CMakeLists.txt | ||
| dw_ictl.c | ||
| dw_ictl.h | ||
| exti_stm32.c | ||
| exti_stm32.h | ||
| i8259.c | ||
| ioapic_intr.c | ||
| ioapic_priv.h | ||
| Kconfig | ||
| Kconfig.multilevel | ||
| Kconfig.multilevel.aggregator_template | ||
| Kconfig.rv32m1 | ||
| Kconfig.s1000 | ||
| Kconfig.shared_irq | ||
| Kconfig.stm32 | ||
| loapic_intr.c | ||
| loapic_spurious.S | ||
| mvic.c | ||
| plic.c | ||
| plic.h | ||
| rv32m1_intmux.c | ||
| shared_irq.c | ||
| system_apic.c | ||