Extends the MIPI DBI SPI driver class for operating mode C4, SPI 4-wire, with 16 write clocks to send one or multiple byte for commands. Generic data (e.g. GRAM) aligned to 16-bit are passed through and stuffed with bytes if required. Signed-off-by: Stephan Linz <linz@li-pro.net> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||