zephyr/soc
Kamil Serwus cad62fae61 soc: atmel: add base support for C2x SOC
Adds Atmel SAMC20 and SAMC21 soc. C series is based on Cortex-M0+.
C21 contains CAN interface.

The init routines are same for SAMC20 and SAMC21. They use one
clock OSC48M without configuration.

The code is inspirated from atmel_sam0/samd21.

Signed-off-by: Kamil Serwus <kserwus@gmail.com>
2022-11-04 16:03:01 +01:00
..
arc smp: Kconfig: Move to using MP_MAX_NUM_CPUS 2022-10-20 22:04:10 +09:00
arm soc: atmel: add base support for C2x SOC 2022-11-04 16:03:01 +01:00
arm64 boards: fvp_baser_aemv8r: remove SOC_FVP_AEMV8R_EL2_INIT code 2022-10-12 18:46:49 +09:00
mips asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
nios2 linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
posix cmake: Update CONFIG_ASAN support 2022-08-19 08:30:01 +02:00
riscv it8xxx2: support relocating ISR code to RAM 2022-10-21 20:31:47 +02:00
sparc linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
x86 soc: raptor_lake: Cleanup CMakeLists 2022-10-25 09:50:15 -05:00
xtensa soc: xtensa: intel_adsp: ace: set number of cpus at boot 2022-11-03 16:43:53 -04:00
Kconfig soc: Add ability for SOC to specify runtime CPU detection 2022-11-03 16:43:53 -04:00